framework,version,device,op_name,kernel_source,mla_dtype,kv_cache_dtype,num_heads,batch_size,isl,tp_size,step,latency
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,1,8,0,0.5033440192540487
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,1,1,0,0.6708319981892904
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,1,1,0,0.3473386764526367
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,1,2,0,0.3596426645914714
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,1,4,0,0.5162239869435629
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,1,2,0,0.5189493497212728
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,1,4,0,0.4848959843317668
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,1,8,0,0.3428906599680583
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,1,16,0,0.34007465839385986
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,1,32,0,0.4246986707051595
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,1,32,0,0.35252801577250165
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,1,4,0,0.34373335043589276
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,1,1,0,0.33292800188064575
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,1,2,0,0.3100053270657857
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,1,16,0,0.33921066919962567
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,1,32,0,0.34888001283009845
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,1,8,0,1.9774452845255535
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,1,1,0,0.3078400095303853
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,1,16,0,0.34514133135477704
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,1,2,0,0.30798399448394775
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,1,4,0,0.33377599716186523
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,1,8,0,0.34540800253550213
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,1,16,0,0.3463040192921956
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,1,32,0,0.3412693341573079
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,1,64,0,0.3123040000597636
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,1,1,0,0.31214932600657147
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,1,2,0,0.31515200932820636
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,1,4,0,0.3279573321342468
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,1,8,0,0.3367573420206706
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,1,16,0,0.3110666672388713
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,1,32,0,0.3343946536382039
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,1,64,0,0.32893333832422894
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,1,64,0,0.34279998143513996
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,32,1,1,0,0.3091626763343811
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,32,1,2,0,0.3104106585184733
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,32,1,4,0,0.3256160020828247
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,1,64,0,0.3070879975954692
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,32,1,8,0,0.3330933252970378
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,32,1,16,0,0.3134613235791524
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,32,1,32,0,0.3328640063603719
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,32,1,64,0,0.33524266878763836
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,64,1,1,0,0.31964800755182904
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,1,64,0,0.3088853359222412
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,64,1,4,0,0.33352001508076984
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,64,1,2,0,0.33475200335184735
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,64,1,16,0,0.33933866024017334
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,64,1,8,0,0.3251360058784485
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,64,1,32,0,0.33634666601816815
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,64,1,64,0,0.3373599847157796
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,128,1,1,0,0.3119093378384908
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,128,1,2,0,0.3068266709645589
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,128,1,4,0,0.30186132589975995
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,64,1,128,0,0.5041173299153646
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,1,128,0,0.5229599873224894
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,128,1,8,0,0.30081599950790405
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,128,1,64,0,0.33032000064849854
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,128,1,16,0,0.3383306662241618
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,128,1,32,0,0.31062932809193927
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,128,1,128,0,0.3028480013211568
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,256,1,1,0,0.6720213095347086
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,256,1,2,0,0.3065440058708191
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,256,1,4,0,0.3019253412882487
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,256,1,8,0,0.33099732796351117
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,256,1,16,0,0.3340959946314494
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,256,1,32,0,0.3287840088208516
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,16,1,0,0.2860853274663289
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,256,1,64,0,0.33558932940165204
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,256,1,128,0,0.3365973234176636
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,16,2,0,0.29761600494384766
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,16,4,0,0.29587199290593463
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,16,32,0,0.2972853382428487
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,16,16,0,0.2998186747233073
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,16,8,0,0.27904532353083294
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,16,64,0,0.29709333181381226
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,16,128,0,0.265882670879364
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,16,4,0,0.3283360004425049
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,16,2,0,0.2808906634648641
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,16,1,0,0.2714293400446574
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,16,16,0,0.29289066791534424
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,16,32,0,0.2988693316777547
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,16,8,0,0.29867200056711835
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,16,64,0,0.31895466645558673
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,16,128,0,0.2902773420015971
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,16,1,0,0.2895093361536662
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,16,2,0,0.2908373276392619
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,16,4,0,0.2999839981396993
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,16,8,0,0.8639199733734131
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,16,16,0,0.3018239935239156
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,16,32,0,0.2974399924278259
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,16,64,0,0.29185599088668823
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,16,128,0,0.2552746733029683
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,16,1,0,0.29340799649556476
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,16,4,0,0.2940586606661479
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,16,2,0,0.290608008702596
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,1,128,0,0.30852266152699787
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,16,8,0,0.29833600918451947
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,16,64,0,0.2956426739692688
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,16,16,0,0.29237866401672363
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,16,128,0,0.273632009824117
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,16,32,0,1.4593706130981445
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,16,2,0,0.2971839904785156
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,16,1,0,0.2847306728363037
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,16,4,0,0.2683626612027486
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,1,128,0,0.30875200033187866
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,16,16,0,0.29738666613896686
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,16,64,0,0.29942933718363446
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,16,128,0,0.2725279927253723
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,16,8,0,0.30453866720199585
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,16,32,0,0.36559466520945233
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,1,128,0,0.3186453382174174
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,32,16,8,0,0.28570665915807086
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,32,16,16,0,0.2990986704826355
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,32,16,4,0,0.30723732709884644
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,32,16,2,0,0.29639466603597003
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,32,16,1,0,0.40442665417989093
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,32,16,32,0,0.29315733909606934
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,32,16,64,0,0.29496000210444134
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,32,16,128,0,0.27907200654347736
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,64,16,2,0,0.39741333325703937
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,64,16,1,0,0.9289173285166422
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,64,16,8,0,0.29443732897440594
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,64,16,16,0,0.3019040028254191
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,64,16,4,0,0.271999994913737
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,64,16,64,0,0.29393599430720013
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,64,16,32,0,0.290885329246521
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,64,16,128,0,0.27457066377003986
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,128,16,2,0,0.9214346408843994
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,128,16,4,0,0.37883734703063965
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,128,16,8,0,0.28701867659886676
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,128,16,16,0,0.2971893350283305
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,128,16,1,0,2.151408036549886
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,128,16,32,0,0.2839733362197876
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,128,16,128,0,0.27819732824961346
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,128,16,64,0,0.2972373366355896
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,256,16,2,0,2.1093600591023765
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,256,16,4,0,0.8852159976959229
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,256,16,16,0,0.2956266601880391
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,256,16,1,0,4.409152030944824
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,256,16,8,0,0.39929068088531494
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,32,1,0,0.29286400477091473
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,32,2,0,0.2900480031967163
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,256,16,32,0,0.29773332675298053
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,32,4,0,0.2966346740722656
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,32,8,0,0.32843200365702313
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,256,16,64,0,0.29360000292460126
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,256,16,128,0,0.273199995358785
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,32,16,0,0.2780906756718953
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,32,32,0,0.30429333448410034
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,32,64,0,0.2753760019938151
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,32,128,0,0.2737013300259908
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,32,2,0,0.2924533287684123
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,32,4,0,0.27076266209284466
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,32,1,0,0.28152533372243244
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,32,16,0,0.3017546733220418
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,32,32,0,0.2983253399531047
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,32,64,0,0.30984532833099365
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,32,128,0,0.27161065737406415
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,32,8,0,0.2994719942410787
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,32,1,0,0.2941280007362366
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,32,8,0,0.6969333489735922
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,32,4,0,0.30268265803654987
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,32,16,0,0.2974399924278259
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,32,2,0,0.8889813423156738
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,32,32,0,0.3067306677500407
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,32,64,0,0.37063467502593994
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,32,128,0,0.2686186631520589
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,32,2,0,0.29682133595148724
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,32,4,0,0.2969226638476054
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,1,128,0,0.31353066364924115
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,32,1,0,0.2810239990552266
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,32,8,0,0.3054453333218892
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,32,16,0,0.2971893350283305
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,32,32,0,0.29530133803685504
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,32,64,0,0.6897173722585043
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,32,128,0,0.32866134246190387
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,32,1,0,0.3710933526357015
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,32,4,0,0.3038559953371684
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,32,2,0,0.43250131607055664
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,32,8,0,0.3035893241564433
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,32,32,0,0.3001493414243062
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,32,16,0,0.34753600756327313
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,32,128,0,0.27397332588831586
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,32,64,0,0.3206719954808553
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,32,32,2,0,0.3682239850362142
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,32,32,1,0,0.9366719722747803
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,32,32,8,0,0.2980479995409648
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,32,32,16,0,0.2984960079193115
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,32,32,4,0,0.3049973249435425
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,32,32,32,0,0.27483733495076496
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,32,32,64,0,0.3036693334579468
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,32,32,128,0,0.27316800753275555
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,64,32,2,0,0.9199840227762858
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,64,32,4,0,0.3540533383687337
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,64,32,1,0,2.1380693117777505
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,64,32,16,0,0.3001013398170471
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,64,32,8,0,0.28139734268188477
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,64,32,32,0,0.2693706750869751
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,64,32,64,0,0.29357866446177167
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,64,32,128,0,0.251583993434906
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,128,32,8,0,0.39397867520650226
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,128,32,32,0,0.29941866795221966
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,128,32,4,0,0.8909119764963785
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,128,32,2,0,2.1330506006876626
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,128,32,16,0,0.3037066658337911
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,128,32,1,0,4.510656038920085
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,128,32,64,0,0.2958186666170756
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,128,32,128,0,0.2692799965540568
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,256,32,4,0,2.085397402445475
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,256,32,8,0,0.923466682434082
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,32,1,128,0,0.3184693257013957
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,256,32,32,0,0.2983679970105489
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,256,32,16,0,0.4052000045776367
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,256,32,2,0,4.38263479868571
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,64,1,0,0.2715573310852051
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,64,2,0,0.28488532702128094
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,64,4,0,0.3025866746902466
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,64,8,0,0.29874666531880695
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,64,16,0,0.3037760059038798
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,64,32,0,0.29893867174784344
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,256,32,1,0,8.80956776936849
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,256,32,128,0,0.27989333868026733
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,256,32,64,0,0.3044000069300334
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,64,128,0,0.2757706642150879
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,64,64,0,1.3511253992716472
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,64,4,0,0.35926934083302814
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,64,2,0,0.26759467522303265
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,64,1,0,0.27375467618306476
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,64,8,0,0.302021324634552
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,64,32,0,0.2977653344472249
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,64,16,0,0.3006666700045268
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,64,128,0,0.2783413330713908
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,64,1,0,0.2975253264109294
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,64,2,0,0.29891733328501385
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,64,64,0,0.38356268405914307
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,64,4,0,0.29663999875386554
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,64,8,0,0.35418665409088135
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,64,16,0,1.1520000298817952
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,64,128,0,1.6157760620117188
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,64,32,0,0.2967466711997986
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,64,64,0,0.31011732419331867
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,64,2,0,0.27402667204538983
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,64,1,0,0.3953440189361572
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,64,4,0,0.3049973249435425
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,64,16,0,0.3009759982426961
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,64,8,0,1.7082133293151855
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,64,2,0,0.36557332674662274
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,64,128,0,0.2804960012435913
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,64,64,0,0.30218666791915894
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,64,32,0,0.29922666152318317
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,64,8,0,0.27948800722757977
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,64,4,0,0.32283733288447064
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,64,1,0,0.9546506404876709
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,64,16,0,0.2749759952227275
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,64,32,0,0.297487994035085
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,64,128,0,0.3017333348592122
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,64,64,0,0.33371734619140625
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,32,64,4,0,0.34825066725413006
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,32,64,8,0,0.36370134353637695
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,32,64,32,0,1.4069973627726238
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,32,64,2,0,0.9350612958272299
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,32,64,16,0,0.3120746612548828
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,32,64,1,0,2.160927931467692
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,32,64,64,0,0.2974239985148112
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,32,64,128,0,0.2783733407656352
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,64,64,4,0,0.8903093338012695
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,64,64,8,0,0.38143467903137207
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,64,64,2,0,2.1167732874552407
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,64,64,16,0,0.29230932394663495
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,64,64,32,0,0.27577600876490277
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,64,64,1,0,4.467535972595215
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,64,64,64,0,0.32947733004887897
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,64,64,128,0,0.2550719976425171
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,128,64,32,0,0.2962239980697632
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,128,64,16,0,0.370255986849467
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,128,64,2,0,4.333429336547852
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,128,64,8,0,0.9052373568216959
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,128,64,4,0,2.092106660207113
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,128,64,64,0,0.2988319993019104
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,128,64,1,0,8.913808186848959
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,128,64,128,0,0.26946133375167847
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,256,64,16,0,0.9628480275472006
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,256,64,32,0,0.43967998027801514
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,256,64,8,0,2.129759947458903
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,256,64,4,0,4.306234677632649
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,256,64,2,0,8.910954793294271
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,128,1,0,0.27027734120686847
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,128,2,0,0.30476266145706177
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,128,4,0,0.30111465851465863
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,128,8,0,0.29553600152333576
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,128,16,0,0.30166399478912354
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,256,64,64,0,0.3095360000928243
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,256,64,128,0,0.2532266577084859
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,128,64,0,0.30054400364557904
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,256,64,1,0,17.6986083984375
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,128,2,0,0.3041546742121379
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,128,32,0,0.2972586750984192
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,128,4,0,1.9786133766174316
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,128,8,0,0.29875733455022174
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,128,128,0,0.2657066583633423
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,128,1,0,0.27316800753275555
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,128,16,0,0.30272533496220905
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,128,32,0,0.3023413419723511
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,128,128,0,0.2773333390553792
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,128,64,0,0.30507200956344604
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,128,2,0,0.36927998065948486
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,128,1,0,0.3935573498408
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,128,4,0,0.2958186666170756
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,128,32,0,0.30242133140563965
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,128,64,0,0.2990079919497172
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,128,16,0,0.30056534210840863
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,128,128,0,0.28119999170303345
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,128,8,0,0.29713600873947144
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,128,1,0,0.93339737256368
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,128,16,0,0.30687467257181805
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,128,32,0,0.29841599861780804
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,128,2,0,0.34414398670196533
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,128,4,0,0.27357866366704303
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,128,64,0,0.36740267276763916
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,128,8,0,1.325610637664795
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,128,128,0,0.2482666571935018
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,128,8,0,0.30246933301289874
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,128,4,0,0.47469866275787354
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,128,64,0,0.2985173265139262
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,128,32,0,0.2756320039431254
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,128,16,0,0.2784159978230794
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,128,2,0,0.9178187052408854
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,128,128,0,0.27694400151570636
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,128,1,0,2.158026695251465
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,32,128,16,0,0.3015146652857463
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,32,128,4,0,0.8808320363362631
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,32,128,8,0,0.35577599207560223
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,32,128,2,0,2.1393067042032876
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,32,128,32,0,0.2996533314387004
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,32,128,64,0,0.30434133609135944
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,32,128,1,0,4.3839467366536455
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,32,128,128,0,0.38493335247039795
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,64,128,8,0,0.8994719982147217
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,64,128,64,0,0.2985493342081706
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,64,128,32,0,0.30502933263778687
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,64,128,16,0,0.36131731669108075
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,64,128,2,0,4.347285270690918
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,64,128,4,0,2.095754623413086
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,64,128,128,0,0.27852267026901245
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,64,128,1,0,8.922693252563477
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,128,128,32,0,0.4357066551844279
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,128,128,16,0,0.9341973463694254
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,128,128,8,0,2.1272427241007485
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,128,128,4,0,4.299482663472493
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,128,128,64,0,0.30621333916982013
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,128,128,128,0,0.25221866369247437
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,128,128,2,0,8.950106938680014
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,256,128,16,0,2.209887981414795
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,128,128,1,0,17.768452962239582
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,256,128,8,0,4.364746729532878
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,256,128,4,0,8.599802652994791
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,256,1,0,0.30377066135406494
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,256,128,32,0,1.0122506618499756
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,256,2,0,0.28991466760635376
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,256,4,0,0.2996693253517151
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,256,128,64,0,0.5100746552149454
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,256,128,128,0,0.2977866729100545
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,256,8,0,0.2938026587168376
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,256,128,2,0,17.57193120320638
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,256,32,0,0.3015786608060201
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,256,16,0,0.2821226716041565
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,256,64,0,0.301530659198761
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,256,4,0,0.3015413284301758
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,256,128,0,3.15721066792806
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,256,2,0,0.3188426693280538
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,256,8,0,0.3347413142522176
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,256,16,0,0.2951359947522481
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,256,1,0,0.4471893310546875
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,256,32,0,0.30087467034657794
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,256,64,0,0.30590933561325073
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,256,128,0,0.5476693312327067
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,256,2,0,0.358512004216512
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,256,4,0,0.3052906592686971
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,256,1,0,0.9343840281168619
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,256,16,0,0.30180267492930096
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,256,8,0,0.3035946687062581
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,256,32,0,0.3054986596107483
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,256,128,0,0.27615465720494586
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,256,64,0,0.29736000299453735
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,256,2,0,0.9238933722178141
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,256,16,0,0.30642133951187134
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,256,4,0,0.36165865262349445
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,256,8,0,1.1221493085225422
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,256,128,1,0,35.67195129394531
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,256,32,0,0.30026666323343915
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,256,1,0,2.1544747352600098
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,256,128,0,0.27948800722757977
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,256,64,0,0.30011733373006183
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,256,8,0,0.34745601812998456
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,256,4,0,0.8960373401641846
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,256,2,0,2.1218667030334473
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,256,64,0,0.30084266265233356
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,256,32,0,0.6669653256734213
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,256,128,0,0.30636799335479736
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,256,16,0,0.59661332766215
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,256,1,0,4.452927907307942
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,32,256,32,0,0.3053706685702006
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,32,256,16,0,0.36534400780995685
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,32,256,8,0,0.900277296702067
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,32,256,64,0,0.3012160062789917
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,32,256,4,0,2.1000266075134277
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,32,256,128,0,0.27475200096766156
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,32,256,2,0,4.390773455301921
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,32,256,1,0,8.900922775268555
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,64,256,16,0,0.9486933549245199
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,64,256,8,0,2.126234690348307
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,64,256,4,0,4.3049014409383135
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,64,256,32,0,0.46262399355570477
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,64,256,64,0,0.2781440019607544
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,64,256,128,0,0.25148799022038776
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,64,256,2,0,8.932095845540365
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,64,256,1,0,17.839839935302734
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,128,256,8,0,4.3814239501953125
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,128,256,16,0,2.2057387034098306
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,128,256,32,0,1.0211466948191326
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,128,256,4,0,8.666789372762045
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,128,256,64,0,0.5099306503931681
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,128,256,128,0,0.3036160071690877
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,128,256,2,0,17.275386810302734
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,256,256,16,0,4.594895998636882
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,256,256,32,0,2.4326772689819336
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,256,256,8,0,8.879082361857096
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,512,1,0,0.40029335021972656
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,512,2,0,0.2905813256899516
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,512,4,0,0.29420799016952515
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,128,256,1,0,35.62088521321615
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,512,8,0,0.32814933856328327
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,256,256,4,0,17.571695963541668
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,256,256,64,0,1.2315573692321777
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,512,32,0,0.29571733872095746
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,512,16,0,0.3078506588935852
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,512,64,0,0.3899253209431966
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,256,256,128,0,0.7162400086720785
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,512,128,0,0.40035732587178546
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,512,2,0,0.3710613250732422
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,512,4,0,0.2940479914347331
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,512,1,0,0.9400959809621176
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,512,8,0,0.3012106617291768
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,512,32,0,0.2953973412513733
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,512,64,0,0.6507306496302286
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,512,16,0,0.2972106734911601
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,512,128,0,0.27660266558329266
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,512,8,0,0.30536532402038574
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,512,4,0,0.3561760187149048
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,512,1,0,2.1746880213419595
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,512,16,0,0.28043200572331745
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,512,32,0,0.29585067431132
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,512,2,0,0.9318719704945883
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,512,64,0,0.298250675201416
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,512,128,0,0.28389867146809894
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,512,4,0,0.9015946388244629
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,256,256,2,0,35.44037882486979
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,512,8,0,0.40038931369781494
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,512,2,0,2.1273652712504068
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,512,16,0,0.3003679911295573
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,512,64,0,0.29385600487391156
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,512,32,0,0.3142613371213277
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,512,1,0,4.456917444864909
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,512,128,0,0.2845919926961263
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,512,4,0,2.098421255747477
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,512,32,0,0.3015893300374349
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,512,16,0,0.4044640064239502
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,512,8,0,0.9189600149790446
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,512,2,0,4.4762773513793945
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,512,128,0,0.7764053344726562
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,512,64,0,0.7043840090433756
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,32,512,16,0,0.9619413216908773
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,32,512,8,0,2.1389387448628745
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,512,1,0,8.904778798421225
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,32,512,32,0,0.4245440165201823
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,32,512,4,0,4.313285191853841
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,32,512,64,0,0.2972053289413452
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,32,512,128,0,0.27391467491785687
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,32,512,2,0,8.923088073730469
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,64,512,16,0,2.224821408589681
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,32,512,1,0,17.804351806640625
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,64,512,8,0,4.395973205566406
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,256,256,1,0,71.32395935058594
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,64,512,32,0,1.0396587053934734
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,64,512,4,0,8.633573532104492
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,64,512,64,0,0.514842669169108
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,64,512,128,0,0.3111199935277303
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,64,512,2,0,17.333892822265625
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,128,512,16,0,4.61134401957194
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,128,512,64,0,1.2436319986979167
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,128,512,8,0,8.926959991455078
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,128,512,32,0,2.4524854024251304
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,128,512,128,0,0.683135986328125
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,1024,1,0,0.9853119850158691
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,1024,2,0,0.3948213259379069
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,1024,4,0,0.3095466693242391
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,1024,8,0,0.305242657661438
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,1024,32,0,0.2947840094566345
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,1024,16,0,0.30165332555770874
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,1024,64,0,0.2751786708831787
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,128,512,4,0,17.596698760986328
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,1024,128,0,0.280239999294281
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,64,512,1,0,35.75266774495443
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,1024,4,0,0.38674132029215497
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,1024,8,0,0.46434664726257324
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,1024,2,0,0.9583253065745035
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,1024,1,0,2.1816107432047525
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,1024,16,0,0.3010080059369405
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,1024,64,0,0.2977280020713806
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,1024,128,0,1.8538880348205566
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,1024,32,0,1.3066293398539226
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,1024,2,0,2.1743146578470864
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,1024,8,0,0.42813865343729657
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,1024,16,0,0.3014026681582133
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,1024,4,0,0.9287306467692057
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,1024,32,0,0.2836906711260478
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,1024,64,0,0.2982666691144307
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,1024,1,0,4.552762667338054
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,1024,128,0,0.30348267157872516
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,128,512,2,0,35.38396199544271
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,1024,16,0,0.44125866889953613
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,1024,4,0,2.147696018218994
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,1024,8,0,0.9407040278116862
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,1024,32,0,0.2817866603533427
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,1024,64,0,0.27491732438405353
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,1024,2,0,4.514917373657227
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,1024,128,0,0.2511039972305298
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,1024,1,0,8.936981201171875
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,1024,16,0,0.9854613145192465
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,1024,8,0,2.1533974011739097
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,1024,4,0,4.379594802856445
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,1024,32,0,0.4806506633758545
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,1024,64,0,0.31445332368214923
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,1024,128,0,0.2776053349177043
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,1024,2,0,8.826170603434244
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,32,1024,8,0,4.423941294352214
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,32,1024,16,0,2.2369972864786782
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,32,1024,4,0,8.685813268025717
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,32,1024,32,0,1.0566933155059814
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,32,1024,64,0,0.5411466757456461
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,1024,1,0,17.769765218098957
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,32,1024,128,0,0.3468053340911865
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,32,1024,2,0,17.58465067545573
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,128,512,1,0,71.08704630533855
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,64,1024,8,0,8.933445612589518
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,64,1024,32,0,2.457045396169027
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,64,1024,64,0,1.262821356455485
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,64,1024,16,0,4.66322135925293
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,64,1024,128,0,0.7230506738026937
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,1536,1,0,1.6153173446655273
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,1536,2,0,0.7154826323191324
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,1536,4,0,0.3452106714248657
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,1536,8,0,0.29530133803685504
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,1536,16,0,0.29684799909591675
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,64,1024,4,0,17.476656595865887
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,1536,32,0,0.3080959916114807
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,1536,64,0,0.29532267649968463
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,1536,128,0,0.28061334292093915
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,1536,4,0,0.69651198387146
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,32,1024,1,0,35.671722412109375
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,1536,2,0,1.5392853418986003
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,1536,8,0,1.004197359085083
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,1536,16,0,0.30261866251627606
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,1536,32,0,0.3421599864959717
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,1536,64,0,0.3004639943440755
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,1536,1,0,3.4113279978434243
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,1536,128,0,0.29132266839345294
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,1536,4,0,1.4905440012613933
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,1536,8,0,0.7094293435414633
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,1536,16,0,0.3657919963200887
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,1536,2,0,3.3281545639038086
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,1536,32,0,0.307151993115743
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,64,1024,2,0,34.79444885253906
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,1536,64,0,0.2994346618652344
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,1536,128,0,0.27480532725652057
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,1536,1,0,6.597888310750325
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,1536,16,0,1.3736693064371746
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,1536,8,0,1.5377599398295085
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,1536,4,0,3.296565373738607
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,1536,32,0,0.41052265961964923
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,1536,64,0,0.30104533831278485
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,1536,128,0,0.2777973413467407
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,1536,2,0,6.607983907063802
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,1536,16,0,1.6009386380513508
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,1536,8,0,3.347381273905436
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,1536,1,0,13.374309539794922
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,1536,4,0,6.507712046305339
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,1536,32,0,0.7809546788533529
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,1536,64,0,0.4129226605097453
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,1536,128,0,0.29127999146779376
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,1536,2,0,13.505093892415365
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,32,1536,16,0,3.5054238637288413
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,32,1536,32,0,1.7316959698994954
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,32,1536,64,0,0.9209012985229492
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,32,1536,8,0,6.743509292602539
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,32,1536,128,0,0.5520000060399374
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,2048,2,0,1.0310773054758708
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,2048,4,0,0.5031840006510416
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,2048,1,0,2.311237335205078
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,32,1536,4,0,13.12612787882487
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,1536,1,0,26.72962188720703
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,2048,8,0,0.2961706717809041
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,64,1024,1,0,71.08472188313802
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,2048,32,0,0.302565336227417
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,2048,64,0,0.2999359965324402
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,2048,16,0,0.3086026708285014
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,2048,128,0,0.28758400678634644
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,2048,4,0,0.9890507062276205
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,2048,8,0,0.5075999895731608
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,2048,16,0,0.31542400519053143
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,2048,2,0,2.2452799479166665
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,2048,32,0,0.3017333348592122
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,2048,64,0,0.29977599779764813
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,2048,128,0,0.3105439941088359
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,2048,1,0,4.567232131958008
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,32,1536,2,0,26.367172241210938
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,2048,4,0,2.1742453575134277
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,2048,16,0,0.5239200194676717
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,2048,32,0,0.3208799958229065
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,2048,2,0,4.593818664550781
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,2048,128,0,0.3251466751098633
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,2048,64,0,0.3060426712036133
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,2048,8,0,1.005669355392456
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,2048,1,0,8.927493413289389
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,2048,8,0,2.208144028981527
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,2048,16,0,1.0452266534169514
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,2048,32,0,0.572213331858317
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,2048,64,0,0.3346240123112996
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,2048,128,0,0.28042133649190265
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,2048,4,0,4.453402519226074
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,2048,2,0,8.923088073730469
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,2048,8,0,4.515210787455241
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,2048,16,0,2.291210651397705
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,2048,1,0,17.76361592610677
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,2048,32,0,1.118607997894287
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,2048,4,0,8.775194803873697
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,2048,64,0,0.6617973248163859
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,2048,128,0,0.4191360076268514
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,32,1536,1,0,53.27015686035156
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,2048,2,0,17.419179280598957
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,32,2048,16,0,4.71939214070638
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,32,2048,8,0,9.067781448364258
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,32,2048,32,0,2.520890712738037
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,32,2048,64,0,1.3331147034962971
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,3072,4,0,0.8857920169830322
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,3072,2,0,1.8753600120544434
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,32,2048,128,0,0.8693599700927734
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,3072,8,0,0.5037333170572916
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,3072,16,0,0.31228800614674884
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,3072,32,0,0.30478399991989136
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,3072,1,0,4.010741233825684
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,32,2048,4,0,17.64020284016927
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,3072,64,0,0.2899679938952128
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,3072,128,0,0.25964266061782837
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,2048,1,0,35.31080118815104
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,3072,8,0,0.9356373151143392
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,3072,4,0,1.8333706855773926
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,3072,2,0,3.922938664754232
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,3072,16,0,0.5106826623280843
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,3072,32,0,0.3204853336016337
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,3072,128,0,0.2898400028546651
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,3072,64,0,0.31801066795984906
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,3072,1,0,7.691712061564128
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,3072,8,0,1.855130672454834
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,32,2048,2,0,34.98092142740885
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,3072,16,0,0.9396959940592448
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,3072,4,0,3.847983996073405
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,3072,32,0,0.5285439888636271
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,3072,64,0,0.32037333647410077
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,3072,128,0,0.2882560094197591
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,3072,2,0,7.8239091237386065
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,3072,16,0,1.973413308461507
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,3072,8,0,3.911439895629883
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,3072,1,0,15.212453206380209
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,3072,4,0,7.684906641642253
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,3072,32,0,0.9950719674428304
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,3072,64,0,0.5524426698684692
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,3072,128,0,0.3722720146179199
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,3072,2,0,15.235834757486979
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,3072,16,0,4.061440149943034
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,3072,8,0,7.824282964070638
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,3072,32,0,2.0380160013834634
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,3072,64,0,1.1267840067545574
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,3072,128,0,0.684666633605957
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,3072,4,0,15.330032348632812
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,3072,1,0,30.435882568359375
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,4096,4,0,1.372389316558838
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,4096,2,0,2.96014404296875
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,4096,8,0,0.739466667175293
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,32,2048,1,0,71.01248168945312
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,4096,16,0,0.4228373368581136
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,4096,32,0,0.31993067264556885
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,4096,64,0,0.3149813413619995
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,4096,1,0,5.930047988891602
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,4096,128,0,0.315338671207428
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,4096,32,0,0.4397493203481038
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,4096,16,0,0.7492746512095133
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,4096,4,0,2.9748268127441406
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,4096,8,0,1.409605344136556
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,4096,64,0,0.3171093265215556
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,4096,128,0,0.2996319929758708
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,4096,2,0,5.88754145304362
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,3072,2,0,30.436729431152344
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,4096,8,0,2.92629337310791
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,4096,16,0,1.4345706303914387
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,4096,1,0,11.561711629231771
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,4096,32,0,0.79367462793986
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,4096,64,0,0.48793065547943115
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,4096,4,0,5.817498524983724
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,4096,128,0,0.2968906760215759
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,4096,2,0,11.557088216145834
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,4096,8,0,5.869466781616211
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,4096,16,0,2.999663988749186
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,4096,32,0,1.5039092699686687
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,4096,64,0,0.8956267038981119
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,4096,128,0,0.5627893209457397
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,4096,4,0,11.48577626546224
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,4096,1,0,23.063145955403645
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,3072,1,0,62.09321594238281
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,4096,2,0,23.29552459716797
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,16,4096,64,0,1.7388906478881836
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,16,4096,16,0,6.1224104563395185
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,16,4096,8,0,11.764080047607422
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,16,4096,32,0,3.3497867584228516
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,16,4096,128,0,1.0718080202738445
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,6144,8,0,1.3676320711771648
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,6144,4,0,2.696453412373861
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,16,4096,4,0,23.2455571492513
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,6144,16,0,0.7756319840749105
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,6144,32,0,0.47485868136088055
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,6144,2,0,5.476687749226888
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,6144,64,0,0.3689546585083008
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,6144,128,0,0.3548159996668498
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,6144,1,0,10.819941202799479
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,6144,16,0,1.4359946250915527
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,6144,8,0,2.6714986165364585
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,4096,1,0,47.71516418457031
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,6144,32,0,0.8233280181884766
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,6144,64,0,0.478000005086263
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,6144,128,0,0.4379466772079468
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,6144,4,0,5.435536066691081
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,6144,2,0,10.963568369547525
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,6144,16,0,2.778688112894694
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,6144,8,0,5.522480010986328
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,6144,32,0,1.4625226656595867
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,6144,64,0,0.8295786380767822
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,16,4096,2,0,46.884033203125
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,6144,128,0,0.5475253264109293
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,6144,4,0,10.840821584065756
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,6144,1,0,21.66065724690755
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,6144,2,0,21.801114400227863
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,6144,8,0,11.154720306396484
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,6144,16,0,5.700960159301758
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,6144,32,0,2.9274559020996094
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,6144,64,0,1.5925386746724446
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,6144,128,0,0.9626986980438232
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,6144,4,0,21.93798319498698
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,8192,4,0,4.4120480219523115
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,8192,2,0,8.788202921549479
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,6144,1,0,45.4538828531901
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,8192,8,0,2.1975413958231607
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,8192,16,0,1.2811466852823894
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,8192,32,0,0.7813599904378256
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,8192,64,0,0.47308266162872314
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,8192,128,0,0.4896639982859294
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,8192,1,0,17.783487955729168
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,16,4096,1,0,95.38566080729167
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,6144,2,0,44.7738291422526
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,8192,8,0,4.440080006917317
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,8192,32,0,1.4784587224324544
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,8192,64,0,0.9053440093994141
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,8192,4,0,8.840901056925455
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,8192,16,0,2.218287944793701
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,8192,128,0,0.5151093403498331
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,8192,2,0,17.17869822184245
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,8192,16,0,4.544117291768392
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,8192,32,0,2.3396639823913574
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,8192,8,0,8.831712086995443
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,8192,64,0,1.4446454048156738
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,8192,128,0,0.85098663965861
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,8192,4,0,18.00609079996745
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,8192,1,0,36.369771321614586
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,8,8192,16,0,9.064191818237305
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,8192,2,0,34.58880106608073
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,6144,1,0,90.31221516927083
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,8,8192,64,0,2.5486987431844077
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,8,8192,32,0,4.740000089009603
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,8,8192,8,0,18.134415944417317
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,8,8192,128,0,1.6469225883483887
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,10240,8,0,3.2577012379964194
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,8,8192,4,0,35.62702941894531
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,10240,16,0,1.726245403289795
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,10240,32,0,1.105946699778239
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,10240,4,0,6.425082524617513
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,10240,64,0,0.6271626551946005
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,10240,128,0,0.5674986839294434
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,10240,2,0,13.332778930664062
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,10240,8,0,6.499296188354492
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,10240,1,0,26.693461100260418
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,10240,4,0,13.329935709635416
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,8192,1,0,72.90924072265625
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,10240,32,0,1.8503200213114421
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,10240,16,0,3.3062880833943686
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,10240,64,0,1.0951840082804363
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,10240,128,0,0.7358986536661783
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,10240,2,0,26.331685384114582
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,8,8192,2,0,72.97921244303386
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,10240,16,0,6.723317464192708
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,10240,8,0,13.306607564290365
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,10240,32,0,3.3497438430786133
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,10240,64,0,1.8638346989949544
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,10240,128,0,1.2265866597493489
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,10240,4,0,26.413365681966145
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,10240,1,0,52.89166768391927
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,12288,16,0,2.307391961415609
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,12288,4,0,8.96946652730306
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,12288,8,0,4.810079892476399
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,12288,32,0,1.3573226928710938
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,12288,64,0,0.8849279880523682
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,12288,128,0,0.687397321065267
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,12288,2,0,18.549317677815754
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,10240,2,0,53.46216328938802
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,12288,8,0,9.177658716837565
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,12288,16,0,4.661957422892253
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,12288,32,0,2.4415626525878906
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,12288,64,0,1.4670027097066243
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,12288,1,0,36.88396708170573
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,12288,4,0,18.209461212158203
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,12288,128,0,0.889253298441569
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,12288,2,0,36.839220682779946
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,12288,8,0,18.397003173828125
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,8,8192,1,0,149.85237630208334
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,12288,64,0,2.643082618713379
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,12288,32,0,4.786917368570964
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,12288,16,0,9.624575932820639
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,12288,128,0,1.547152042388916
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,12288,4,0,37.466756184895836
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,10240,1,0,109.5310770670573
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,16384,8,0,7.828458786010742
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,16384,4,0,14.967957814534506
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,16384,64,0,1.4430079460144043
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,16384,32,0,2.2289172808329263
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,16384,16,0,3.853077252705892
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,16384,128,0,0.8779040177663168
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,12288,1,0,76.08553568522136
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,16384,2,0,30.899269104003906
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,16384,16,0,7.733477274576823
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,16384,8,0,15.599370320638021
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,16384,32,0,3.9492534001668296
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,12288,2,0,74.49172973632812
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,16384,64,0,2.236234664916992
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,16384,128,0,1.5446772575378418
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,16384,4,0,31.207232157389324
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,16384,1,0,62.90116882324219
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,16384,2,0,62.36202494303385
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,4,16384,16,0,15.653578440348307
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,4,16384,8,0,31.210601806640625
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,4,16384,32,0,7.940453211466472
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,4,16384,64,0,4.186890602111816
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,4,16384,128,0,2.562837282816569
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,12288,1,0,151.85319010416666
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,4,16384,4,0,62.575897216796875
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,1,32768,16,0,14.488394419352213
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,1,32768,32,0,7.243994394938151
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,16384,1,0,126.70060221354167
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,1,32768,64,0,4.00163205464681
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,1,32768,8,0,28.939295450846355
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,1,32768,128,0,2.6074399948120117
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,1,32768,4,0,57.37730916341146
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,4,16384,2,0,127.33363850911458
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,8,2,32768,16,0,29.338180541992188
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,1,32768,2,0,117.36569213867188
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,16,2,32768,8,0,58.233378092447914
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,4,2,32768,32,0,14.635664621988932
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,1,2,32768,128,0,4.279871940612793
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,2,2,32768,64,0,7.652581532796224
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,32,2,32768,4,0,116.2940673828125
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,4,16384,1,0,256.4333902994792
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,1,32768,1,0,232.4879353841146
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,64,2,32768,2,0,230.4430135091146
VLLM,0.14.0,NVIDIA L40S,context_mla,vllm_triton_mla,float16,float16,128,2,32768,1,0,464.5299886067708
