SimulatorNetlist

class decida.SimulatorNetlist.SimulatorNetlist(netlist_file, **kwargs)

Bases: ItclObjectx

synopsis:

Circuit simulator netlist parsing.

SimulatorNetlist reads a circuit-simulator netlist and extracts some limited information about the circuit, such as lists or devices, and total capacitance on each node.

constructor arguments:

netlist_file (str)

simulator netlist file

**kwargs (dict)

configuration-options

configuration options:

verbose (bool) (optional, default=False)

enable/disable verbose mode

simulator (str) (optional, default=”sspice”)

circuit simulator associated with the netlist file, one of :

simulator:	format:
spice	spice
hspice	spice
sspice	spice
eldo	spice
adit	spice
nanosim	spice
finesim	spice
ngspice	spice
spectre	spectre
spectrerf	spectre
ncverilog	verilog
ncsim	verilog
vsim	verilog
vcs	verilog

example (from test_SimulatorNetlist):

from decida.SimulatorNetlist import SimulatorNetlist

s = SimulatorNetlist("sar_seq_dig.net", simulator="ngspice")
print("subcircuits :")
print(s.get("subckts"))
print("instances :")
print(s.get("insts"))
print("capacitors:")
print(s.get("caps"))
print("resistors:")
print(s.get("ress"))

public methods:

• public methods from ItclObjectx

capacitance_report(report_format='column')

get(what, **kwargs)

access method for several parameters.

arguments:

what (string)

specify what to retrieve:

• netlist-file: return netlist file path

• netlist-format: netlist format (circuit simulator)

• original-netlist: unmodified netlist text

• filtered-netlist: netlist after line-continuations and other preprocessing has been done

• subckts: list of subcircuits defined in the netlist

• insts: list of subcircuit instances in the netlist

• caps: list of capacitors in the netlist

• ress: list of resistors in the netlist

**kwargs (dict)

unused

get_cap(cap, detail)

get capacitor information.

arguments:

cap (str)

name of capacitor instance

detail (str)

one of:

• ports: return list of capacitor ports

• value: return capacitance value

get_inst(inst, detail)

get subcircuit instance information.

arguments:

inst (str)

name of subcircuit instance

detail (str)

one of:

• ports: return list of instance ports

• params: return list of instance parameters

• subckt: return subcircuit name

get_res(res, detail)

get resistor information.

arguments:

res (str)

name of resistor instance

detail (str)

one of:

• ports: return list of resistor ports

• value: return resistor value

get_subckt(subckt, detail)

get subcircuit information.

arguments:

subckt (str)

name of subcircuit

detail (str)

one of:

• ports: return list of subcircuit ports