Format: https://www.debian.org/doc/packaging-manuals/copyright-format/1.0/
Upstream-Name: naja 
Upstream-Contact: Christophe Alexandre <christophe.alexandre@keplertech.io>
Source: https://github.com/najaeda/naja

Files: .github/workflows/* .github/tsan.supp .gitmodules
Copyright: 2022 The Naja Authors.
License: Apache-2.0

Files: .bazelversion MODULE.bazel.lock
Copyright: 2023 The Naja Authors.
License: Apache-2.0

Files: README.md README.rst README_pages/* AUTHORS docs/* src/najaeda/README/*
Copyright: 2022 The Naja Authors.
License: Apache-2.0

Files: CLAUDE.md AGENTS.md
Copyright: 2026 The Naja Authors.
License: Apache-2.0

Files: test/nl/formats/verilog/benchmarks/* test/nl/snl/kernel/benchs/* test/najaeda/.coveragerc
Copyright: 2022 The Naja Authors.
License: Apache-2.0

Files: src/apps/naja_edit/examples/*
Copyright: 2022 The Naja Authors.
License: Apache-2.0

Files: test/nl/formats/verilog/backend/references/*
Copyright: 2022 The Naja Authors.
License: CC0-1.0

Files: test/nl/formats/liberty/benchmarks/errors/* test/nl/formats/liberty/benchmarks/tests/* thirdparty/yosys-liberty/test/benchmarks/test0.lib
Copyright: 2022 The Naja Authors.
License: CC0-1.0

Files: thirdparty/spdlog-1.17.0/*
Source: https://github.com/gabime/spdlog 
Copyright: 2016 Gabi Melman.
License: MIT

Files: thirdparty/yosys-liberty/src/YosysLibertyParser.cpp thirdparty/yosys-liberty/src/YosysLibertyParser.h
Source: https://github.com/YosysHQ/yosys/tree/main/passes/techmap
Copyright: 2012-2022 The Yosys Authors.
License: ISC

FILES: thirdparty/yosys-liberty/test/benchmarks/test1.lib test/nl/formats/liberty/benchmarks/asap7_excerpt/test0.lib
Copyright: Copyright 2020 Lawrence T. Clark, Vinay Vashishtha, or Arizona State University
License: BSD-3-Clause

FILES: src/najaeda/README.rst src/najaeda/najaeda/docs/*
Copyright: 2022 The Naja Authors.
License: Apache-2.0

FILES: src/najaeda/benchmarks/liberty/* src/najaeda/benchmarks/verilog/tinyrocket.v
Copyright: 2022 The Naja Authors.
License: Apache-2.0

FILES: src/thirdparty/lefdef
Copyright: Cadence Design Systems and distributed by Si2
License: Apache-2.0

FILES: src/najaeda/benchmarks/verilog/vexriscv.v
Copyright: 2016 Spinal HDL contributors.
License: MIT

FILES: thirdparty/lefdef/*
Copyright: Cadence Design Systems and distributed by Si2.
License: Apache-2.0

Files: tutorials/README.md tutorials/images/*
 tutorials/notebooks/01_getting_started.ipynb
 tutorials/notebooks/02_liberty_primitives_design.ipynb
 tutorials/notebooks/03_editing_a_netlist.ipynb
 tutorials/notebooks/04_systemverilog_elaborated_netlist.ipynb
 tutorials/notebooks/05_ibex_riscv_core.ipynb
 tutorials/notebooks/06_fanout_analysis.ipynb
Copyright: 2024 The Naja Authors <https://github.com/najaeda/naja/blob/main/AUTHORS>
License: Apache-2.0
