Metadata-Version: 2.4
Name: fabgate
Version: 0.1.9
Summary: Pre-fabrication quality gate for PCB projects — KiCad design gate plus Gerber/ODB++ fab package checks, scored reports, and CI.
Project-URL: Homepage, https://pypi.org/project/fabgate/
Project-URL: Repository, https://github.com/coderlifevyn12/fabgate
Author: coderlifevyn12
License-Expression: MIT
License-File: LICENSE
Keywords: dfm,drc,emc,hardware,kicad,pcb,release-gate
Classifier: Development Status :: 3 - Alpha
Classifier: Environment :: Console
Classifier: Intended Audience :: Developers
Classifier: Intended Audience :: Science/Research
Classifier: License :: OSI Approved :: MIT License
Classifier: Operating System :: OS Independent
Classifier: Programming Language :: Python :: 3
Classifier: Programming Language :: Python :: 3.11
Classifier: Programming Language :: Python :: 3.12
Classifier: Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)
Requires-Python: >=3.11
Requires-Dist: pydantic-settings>=2.3.0
Requires-Dist: pydantic>=2.7.0
Requires-Dist: pyyaml>=6.0
Requires-Dist: rich>=13.7.0
Requires-Dist: typer>=0.12.0
Provides-Extra: dev
Requires-Dist: pytest>=8.0; extra == 'dev'
Requires-Dist: ruff>=0.4.0; extra == 'dev'
Provides-Extra: emcopilot
Requires-Dist: matplotlib>=3.10.8; extra == 'emcopilot'
Requires-Dist: mcp>=1.0.0; extra == 'emcopilot'
Description-Content-Type: text/markdown

# FabGate

**Pre-fabrication quality gate for PCB projects.**

FabGate runs design checks, detects schematic–layout issues, evaluates fabrication readiness, and generates clear HTML/JSON reports before you send your board to manufacturing. Think of it as **CI/CD for hardware design release**.

## Two modes

| Mode | Input | What you get |
|------|-------|----------------|
| **Design gate** | KiCad project (`.kicad_pcb`) | DRC, schematic parity, layout rules, physics, scored gate |
| **Fab package gate** | Gerber folder or ODB++ `.tgz` | Layer completeness, outline/drill checks, physics on copper |

**Evaluate, optimize, and gate** — three commands in one CLI:

1. **Evaluate** — DRC, schematic parity, emcopilot physics → scored report + checklist  
2. **Optimize** — prioritized fix plan; safe auto-fixes on blank/simple boards  
3. **Gate** — CI pass/hold/fail before you order prototypes  

Autonomous layout is **optional assist only** — not the product focus.

```powershell
pip install fabgate
fabgate evaluate "C:\path\to\your-kicad-project"
fabgate evaluate "C:\path\to\gerber-export-folder"
fabgate evaluate "C:\path\to\design.tgz"
```

---

## Why not just run KiCad DRC?

KiCad DRC finds clearance and shorting errors — but it does not:

- Gate release with a **scored pass / hold / fail** verdict
- Flag **schematic vs layout mismatches** (parts on PCB missing from schematic, and vice versa)
- Run **EMC / power / signal-integrity** physics review
- Produce a **shareable HTML report + fix checklist** with KiCad jump coordinates
- Plug into **CI** with standard exit codes

FabGate bundles that into one pre-fab gate.

---

## What you get

### Core (works out of the box)

| Feature | What it does |
|---------|--------------|
| **KiCad DRC** | Clearance, shorts, edge violations, silkscreen — via `kicad-cli` |
| **Schematic parity** | Catches layout/schematic mismatches before they become rework |
| **Scored verdict** | 0–100 score, pass / hold / fail — cosmetic noise capped so one silk warning won't zero your score |
| **HTML + JSON reports** | Audit trail you can share with your team or client |
| **Fix checklist** | Prioritized actions with KiCad jump coords — press `Ctrl+F` and go |

### Deep review (optional)

| Feature | What it does |
|---------|--------------|
| **Physics review** | EMC, power integrity, signal integrity via [emcopilot](https://github.com/RFingAdam/mcp-pcb-emcopilot) |
| **Power trace checks** | IPC-based width recommendations for high-current nets |

Install emcopilot separately:

```powershell
pip install git+https://github.com/RFingAdam/mcp-pcb-emcopilot.git
```

### Automation & CI

| Feature | What it does |
|---------|--------------|
| **CI gate** | `fabgate gate` → exit 0 (pass), 1 (hold), 2 (fail) for GitHub Actions / Jenkins |
| **Safe auto-fixes** | Board outline, thickness, GND/power zones, power trace widening |
| **Rollback guardrail** | Auto-fixes are undone if blocking issue count goes up |
| **Design scaffold** | Create blank KiCad projects from a YAML spec |
| **Full workflow** | Design → evaluate → optimize in one pipeline |

> **No LLM calls.** Deterministic KiCad rules and physics-based analyzers only.

---

## Quick start

See [QUICKSTART.md](QUICKSTART.md) for a 5-minute walkthrough.

```powershell
fabgate doctor
fabgate evaluate "C:\path\to\your-kicad-project"
fabgate open "C:\path\to\your-kicad-project"
```

Reports are written to `reports/`:

- `*-review.html` — full report (open in browser)
- `*-evaluation.json` — machine-readable results
- `*-optimization-checklist.md` — what to fix first

### Example output

```
FAIL  Score 72/100
Findings: 48 (blocking 3, warnings 12)

Fix first:
  - Board edge clearance violation @ 89.28, 28.24 mm
  - J101 in schematic but missing from layout
  - +3V3 power trace too narrow @ 126.0, 63.9 mm

Projected score if blocking fixed: 91/100
Checklist: reports\my-board-optimization-checklist.md
```

### CI example

Add `.fabgate.yaml` in your project root to set pass thresholds and which checks block release:

```powershell
fabgate policy init .
fabgate policy show .
fabgate gate .
# exit 0 = pass (OK to fab)
# exit 1 = hold (human review)
# exit 2 = fail (blocking issues)
```

---

## Commands

| Command | Purpose |
|---------|---------|
| `fabgate doctor` | Check KiCad CLI + optional emcopilot |
| `fabgate evaluate` | Full evaluation + HTML report + checklist |
| `fabgate review` | Basic review |
| `fabgate gate` | CI exit code for release pipelines |
| `fabgate optimize run` | Optimization plan + optional safe auto-fixes |
| `fabgate auto run` | Auto-fix loop with rollback guardrail |
| `fabgate design create` | Scaffold new KiCad project from spec |
| `fabgate workflow` | Design → evaluate → optimize |
| `fabgate open` | Open project in KiCad GUI |

---

## Who it's for

- **Hardware teams** — run a pre-fab gate before every prototype order
- **Freelance PCB designers** — deliver scored, auditable releases to clients
- **Startups** — add a KiCad release check to CI without manual DRC hunting

---

## Development install

```powershell
git clone <repo-url>
cd fabgate
python -m venv .venv
.\.venv\Scripts\Activate.ps1
pip install -e ".[dev,emcopilot]"
fabgate doctor
```

## License

MIT
