#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\system.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\vhdl_sys.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\vhdl_textio.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\v2005_math.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\va_math.vpi";
S_0000023deb553610 .scope module, "circle_fsm_32bit_simple_fixed_tb" "circle_fsm_32bit_simple_fixed_tb" 2 18;
 .timescale -9 -12;
P_0000023deb543690 .param/l "CLK_PERIOD" 0 2 21, +C4<00000000000000000000000000001010>;
v0000023deb5b1ec0_0 .var "base_sel", 1 0;
v0000023deb5b0340_0 .var "clk", 0 0;
v0000023deb5b0b60_0 .net "done", 0 0, v0000023deb5b0c00_0;  1 drivers
v0000023deb5b03e0_0 .var/i "error_count", 31 0;
v0000023deb5b1060_0 .var "k_in", 31 0;
v0000023deb5b0ca0_0 .net "ready", 0 0, v0000023deb5b0e80_0;  1 drivers
v0000023deb5b1380_0 .net "result_x", 31 0, v0000023deb5b1d80_0;  1 drivers
v0000023deb5b0480_0 .net "result_y", 31 0, v0000023deb5b0200_0;  1 drivers
v0000023deb5b0840_0 .var "rst_n", 0 0;
v0000023deb5b0160_0 .var "start", 0 0;
v0000023deb5b1f60 .array "test_expected_x_2", 4 0, 31 0;
v0000023deb5b02a0 .array "test_expected_x_3", 4 0, 31 0;
v0000023deb5b1a60 .array "test_expected_x_7", 4 0, 31 0;
v0000023deb5b16a0 .array "test_expected_y_2", 4 0, 31 0;
v0000023deb5b0520 .array "test_expected_y_3", 4 0, 31 0;
v0000023deb5b1b00 .array "test_expected_y_7", 4 0, 31 0;
v0000023deb5b1560_0 .var/i "test_failed", 31 0;
v0000023deb5b1740_0 .var/i "test_index", 31 0;
v0000023deb5b05c0 .array "test_k", 4 0, 31 0;
v0000023deb5b0660_0 .var/i "test_passed", 31 0;
v0000023deb5b14c0_0 .var/i "total_tests", 31 0;
S_0000023deb556230 .scope module, "dut" "circle_fsm_32bit_simple_fixed" 2 57, 3 36 0, S_0000023deb553610;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "k_in";
    .port_info 4 /INPUT 2 "base_sel";
    .port_info 5 /OUTPUT 32 "result_x";
    .port_info 6 /OUTPUT 32 "result_y";
    .port_info 7 /OUTPUT 1 "done";
    .port_info 8 /OUTPUT 1 "ready";
P_0000023deb556920 .param/l "FINISH" 0 3 54, C4<101>;
P_0000023deb556958 .param/l "FP_ONE" 0 3 73, C4<00000000000000010000000000000000>;
P_0000023deb556990 .param/l "FP_ONE_DIV_2PI" 0 3 74, C4<00000000000000000010100010111110>;
P_0000023deb5569c8 .param/l "FP_TWO_PI" 0 3 72, C4<00000000000001100100100001111111>;
P_0000023deb556a00 .param/l "IDLE" 0 3 49, C4<000>;
P_0000023deb556a38 .param/l "START_CORDIC" 0 3 52, C4<011>;
P_0000023deb556a70 .param/l "START_VDC" 0 3 50, C4<001>;
P_0000023deb556aa8 .param/l "WAIT_CORDIC" 0 3 53, C4<100>;
P_0000023deb556ae0 .param/l "WAIT_VDC" 0 3 51, C4<010>;
v0000023deb5aea10_0 .var "angle_reg", 31 0;
v0000023deb5b1240_0 .net "base_sel", 1 0, v0000023deb5b1ec0_0;  1 drivers
v0000023deb5b0d40_0 .net "clk", 0 0, v0000023deb5b0340_0;  1 drivers
v0000023deb5b1c40_0 .var "cordic_angle", 15 0;
v0000023deb5b12e0_0 .net "cordic_cos", 31 0, v0000023deb52a290_0;  1 drivers
v0000023deb5b1880_0 .net "cordic_done", 0 0, v0000023deb529cf0_0;  1 drivers
v0000023deb5b0fc0_0 .net "cordic_sin", 31 0, v0000023deb529e30_0;  1 drivers
v0000023deb5b11a0_0 .var "cordic_start", 0 0;
v0000023deb5b0de0_0 .var "current_state", 2 0;
v0000023deb5b0c00_0 .var "done", 0 0;
v0000023deb5b1ce0_0 .net "k_in", 31 0, v0000023deb5b1060_0;  1 drivers
v0000023deb5b17e0_0 .var "k_reg", 31 0;
v0000023deb5b1420_0 .var "next_state", 2 0;
v0000023deb5b0e80_0 .var "ready", 0 0;
v0000023deb5b1d80_0 .var "result_x", 31 0;
v0000023deb5b0200_0 .var "result_y", 31 0;
v0000023deb5b07a0_0 .net "rst_n", 0 0, v0000023deb5b0840_0;  1 drivers
v0000023deb5b1600_0 .net "start", 0 0, v0000023deb5b0160_0;  1 drivers
v0000023deb5b0ac0_0 .net "vdc_done", 0 0, v0000023deb5af550_0;  1 drivers
v0000023deb5b08e0_0 .net "vdc_ready", 0 0, v0000023deb5afff0_0;  1 drivers
v0000023deb5b0f20_0 .net "vdc_result", 31 0, v0000023deb5aebf0_0;  1 drivers
v0000023deb5b19c0_0 .var "vdc_start", 0 0;
E_0000023deb543fd0 .event anyedge, v0000023deb5b0de0_0, v0000023deb5b1600_0, v0000023deb5af550_0, v0000023deb529cf0_0;
S_0000023deb557d30 .scope module, "cordic_inst" "cordic_trig_16bit_simple_fixed" 3 89, 4 22 0, S_0000023deb556230;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 16 "angle";
    .port_info 4 /OUTPUT 32 "cosine";
    .port_info 5 /OUTPUT 32 "sine";
    .port_info 6 /OUTPUT 1 "done";
    .port_info 7 /OUTPUT 1 "ready";
P_0000023deb04dee0 .param/l "COMPUTE" 0 4 35, C4<01>;
P_0000023deb04df18 .param/l "FINISH" 0 4 36, C4<10>;
P_0000023deb04df50 .param/l "IDLE" 0 4 34, C4<00>;
P_0000023deb04df88 .param/l "K" 0 4 58, C4<01001101101110101>;
v0000023deb52a0b0_0 .net "angle", 15 0, v0000023deb5b1c40_0;  1 drivers
v0000023deb529a70_0 .var "angle_reg", 15 0;
v0000023deb529d90 .array "atan_table", 15 0, 15 0;
v0000023deb52a470_0 .net "clk", 0 0, v0000023deb5b0340_0;  alias, 1 drivers
v0000023deb529b10_0 .var "cos_result", 31 0;
v0000023deb52a290_0 .var "cosine", 31 0;
v0000023deb529cf0_0 .var "done", 0 0;
v0000023deb529570_0 .var "iteration", 3 0;
v0000023deb52abf0_0 .var "next_state", 1 0;
v0000023deb52a330_0 .var "ready", 0 0;
v0000023deb5296b0_0 .var "reduced_angle", 15 0;
v0000023deb52a790_0 .net "rst_n", 0 0, v0000023deb5b0840_0;  alias, 1 drivers
v0000023deb52ab50_0 .var "sin_result", 31 0;
v0000023deb529e30_0 .var "sine", 31 0;
v0000023deb52aa10_0 .net "start", 0 0, v0000023deb5b11a0_0;  1 drivers
v0000023deb529f70_0 .var "state", 1 0;
v0000023deb52a5b0_0 .var "x", 16 0;
v0000023deb52a650_0 .var "x_scaled", 31 0;
v0000023deb5291b0_0 .var "y", 16 0;
v0000023deb52a8d0_0 .var "y_scaled", 31 0;
v0000023deb52aab0_0 .var "z", 15 0;
E_0000023deb5437d0/0 .event negedge, v0000023deb52a790_0;
E_0000023deb5437d0/1 .event posedge, v0000023deb52a470_0;
E_0000023deb5437d0 .event/or E_0000023deb5437d0/0, E_0000023deb5437d0/1;
E_0000023deb543ed0 .event anyedge, v0000023deb529f70_0, v0000023deb52aa10_0, v0000023deb529570_0;
S_0000023deb4af0a0 .scope module, "vdc_inst" "vdcorput_fsm_32bit_simple" 3 77, 5 9 0, S_0000023deb556230;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "k_in";
    .port_info 4 /INPUT 2 "base_sel";
    .port_info 5 /OUTPUT 32 "result";
    .port_info 6 /OUTPUT 1 "done";
    .port_info 7 /OUTPUT 1 "ready";
P_0000023deb4cf460 .param/l "ACCUMULATE" 0 5 24, C4<011>;
P_0000023deb4cf498 .param/l "CHECK" 0 5 26, C4<101>;
P_0000023deb4cf4d0 .param/l "DIVIDE" 0 5 23, C4<010>;
P_0000023deb4cf508 .param/l "FINISH" 0 5 27, C4<110>;
P_0000023deb4cf540 .param/l "FP_HALF" 0 5 41, C4<00000000000000001000000000000000>;
P_0000023deb4cf578 .param/l "FP_ONE" 0 5 40, C4<00000000000000010000000000000000>;
P_0000023deb4cf5b0 .param/l "FP_SEVENTH" 0 5 43, C4<00000000000000000010010010010010>;
P_0000023deb4cf5e8 .param/l "FP_THIRD" 0 5 42, C4<00000000000000000101010101010101>;
P_0000023deb4cf620 .param/l "IDLE" 0 5 21, C4<000>;
P_0000023deb4cf658 .param/l "INIT" 0 5 22, C4<001>;
P_0000023deb4cf690 .param/l "UPDATE" 0 5 25, C4<100>;
v0000023deb5afb90_0 .var "acc_reg", 31 0;
v0000023deb5afc30_0 .var "base_reg", 31 0;
v0000023deb5ae330_0 .net "base_sel", 1 0, v0000023deb5b1ec0_0;  alias, 1 drivers
v0000023deb5afeb0_0 .net "clk", 0 0, v0000023deb5b0340_0;  alias, 1 drivers
v0000023deb5ae150_0 .var "current_state", 2 0;
v0000023deb5ae830_0 .net "div3_quotient", 7 0, L_0000023deb5fee10;  1 drivers
v0000023deb5aff50_0 .net "div3_remainder", 1 0, L_0000023deb5fe2d0;  1 drivers
v0000023deb5af370_0 .net "div7_quotient", 8 0, L_0000023deb600ba0;  1 drivers
v0000023deb5ae8d0_0 .net "div7_remainder", 2 0, L_0000023deb601b40;  1 drivers
v0000023deb5af550_0 .var "done", 0 0;
v0000023deb5af190_0 .net "k_in", 31 0, v0000023deb5b17e0_0;  1 drivers
v0000023deb5ae470_0 .var "k_reg", 31 0;
v0000023deb5afcd0_0 .var "next_state", 2 0;
v0000023deb5af2d0_0 .var "power_reg", 31 0;
v0000023deb5afd70_0 .var "quotient_reg", 31 0;
v0000023deb5afff0_0 .var "ready", 0 0;
v0000023deb5ae5b0_0 .var "remainder_reg", 31 0;
v0000023deb5aebf0_0 .var "result", 31 0;
v0000023deb5ae650_0 .net "rst_n", 0 0, v0000023deb5b0840_0;  alias, 1 drivers
v0000023deb5ae970_0 .net "start", 0 0, v0000023deb5b19c0_0;  1 drivers
E_0000023deb5444d0 .event anyedge, v0000023deb5ae150_0, v0000023deb5ae970_0, v0000023deb5ae470_0;
L_0000023deb5fecd0 .part v0000023deb5ae470_0, 0, 8;
L_0000023deb6013c0 .part v0000023deb5ae470_0, 0, 9;
S_0000023deb4af230 .scope module, "div3_inst" "div_mod_3" 5 52, 6 28 0, S_0000023deb4af0a0;
 .timescale 0 0;
    .port_info 0 /INPUT 8 "n";
    .port_info 1 /OUTPUT 8 "quotient";
    .port_info 2 /OUTPUT 2 "remainder";
L_0000023deb5b2170 .functor BUFT 1, C4<00000>, C4<0>, C4<0>, C4<0>;
v0000023deb52ac90_0 .net *"_ivl_11", 4 0, L_0000023deb5b2170;  1 drivers
v0000023deb52ad30_0 .net *"_ivl_18", 5 0, L_0000023deb5fe9b0;  1 drivers
L_0000023deb5b21b8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000023deb528f30_0 .net *"_ivl_21", 0 0, L_0000023deb5b21b8;  1 drivers
v0000023deb529110_0 .net *"_ivl_22", 5 0, L_0000023deb5fe7d0;  1 drivers
L_0000023deb5b2200 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v0000023deb5292f0_0 .net *"_ivl_25", 3 0, L_0000023deb5b2200;  1 drivers
v0000023deb529390_0 .net *"_ivl_32", 4 0, L_0000023deb5ff950;  1 drivers
L_0000023deb5b2248 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000023deb529430_0 .net *"_ivl_35", 0 0, L_0000023deb5b2248;  1 drivers
v0000023deb5294d0_0 .net *"_ivl_36", 4 0, L_0000023deb5ff590;  1 drivers
L_0000023deb5b2290 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v0000023deb5acbe0_0 .net *"_ivl_39", 2 0, L_0000023deb5b2290;  1 drivers
v0000023deb5ac8c0_0 .net *"_ivl_4", 6 0, L_0000023deb5b0980;  1 drivers
v0000023deb5ad040_0 .net *"_ivl_43", 2 0, L_0000023deb5ff130;  1 drivers
v0000023deb5ac1e0_0 .net *"_ivl_50", 7 0, L_0000023deb5feb90;  1 drivers
L_0000023deb5b22d8 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0000023deb5ac280_0 .net *"_ivl_53", 1 0, L_0000023deb5b22d8;  1 drivers
v0000023deb5ad220_0 .net *"_ivl_54", 7 0, L_0000023deb5ffdb0;  1 drivers
L_0000023deb5b2320 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v0000023deb5ad400_0 .net *"_ivl_57", 2 0, L_0000023deb5b2320;  1 drivers
v0000023deb5ace60_0 .net *"_ivl_58", 7 0, L_0000023deb5fe370;  1 drivers
v0000023deb5ade00_0 .net *"_ivl_60", 7 0, L_0000023deb5ff450;  1 drivers
L_0000023deb5b2368 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v0000023deb5adb80_0 .net *"_ivl_63", 3 0, L_0000023deb5b2368;  1 drivers
v0000023deb5ad360_0 .net *"_ivl_64", 7 0, L_0000023deb5fea50;  1 drivers
v0000023deb5ad540_0 .net *"_ivl_66", 7 0, L_0000023deb5ff770;  1 drivers
L_0000023deb5b23b0 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v0000023deb5ada40_0 .net *"_ivl_69", 5 0, L_0000023deb5b23b0;  1 drivers
L_0000023deb5b2128 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000023deb5adc20_0 .net *"_ivl_7", 0 0, L_0000023deb5b2128;  1 drivers
L_0000023deb5b23f8 .functor BUFT 1, C4<11>, C4<0>, C4<0>, C4<0>;
v0000023deb5ac320_0 .net/2u *"_ivl_72", 1 0, L_0000023deb5b23f8;  1 drivers
v0000023deb5adea0_0 .net *"_ivl_74", 0 0, L_0000023deb5feeb0;  1 drivers
L_0000023deb5b2440 .functor BUFT 1, C4<00000001>, C4<0>, C4<0>, C4<0>;
v0000023deb5ac5a0_0 .net/2u *"_ivl_76", 7 0, L_0000023deb5b2440;  1 drivers
v0000023deb5ac3c0_0 .net *"_ivl_78", 7 0, L_0000023deb5ff270;  1 drivers
v0000023deb5ad4a0_0 .net *"_ivl_8", 6 0, L_0000023deb5b0a20;  1 drivers
L_0000023deb5b2488 .functor BUFT 1, C4<11>, C4<0>, C4<0>, C4<0>;
v0000023deb5acd20_0 .net/2u *"_ivl_82", 1 0, L_0000023deb5b2488;  1 drivers
v0000023deb5ac460_0 .net *"_ivl_84", 0 0, L_0000023deb5fff90;  1 drivers
L_0000023deb5b24d0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0000023deb5ac780_0 .net/2u *"_ivl_86", 1 0, L_0000023deb5b24d0;  1 drivers
v0000023deb5ad5e0_0 .net "n", 7 0, L_0000023deb5fecd0;  1 drivers
v0000023deb5ac500_0 .net "q1", 5 0, L_0000023deb5b1100;  1 drivers
v0000023deb5ac820_0 .net "q2", 4 0, L_0000023deb5fef50;  1 drivers
v0000023deb5ac640_0 .net "q3", 3 0, L_0000023deb5fe870;  1 drivers
v0000023deb5ac140_0 .net "q4", 1 0, L_0000023deb5ff1d0;  1 drivers
v0000023deb5acb40_0 .net "quotient", 7 0, L_0000023deb5fee10;  alias, 1 drivers
v0000023deb5ac6e0_0 .net "quotient_sum", 7 0, L_0000023deb5fe190;  1 drivers
v0000023deb5add60_0 .net "r1", 1 0, L_0000023deb5b0700;  1 drivers
v0000023deb5ad680_0 .net "r2", 1 0, L_0000023deb5ffd10;  1 drivers
v0000023deb5ad720_0 .net "r3", 1 0, L_0000023deb5ffb30;  1 drivers
v0000023deb5adf40_0 .net "r4", 1 0, L_0000023deb5ffef0;  1 drivers
v0000023deb5ad7c0_0 .net "rem1", 6 0, L_0000023deb5fed70;  1 drivers
v0000023deb5acdc0_0 .net "rem2", 5 0, L_0000023deb5ff3b0;  1 drivers
v0000023deb5ad9a0_0 .net "rem3", 4 0, L_0000023deb5ff090;  1 drivers
v0000023deb5ac960_0 .net "rem4", 1 0, L_0000023deb5fec30;  1 drivers
v0000023deb5aca00_0 .net "remainder", 1 0, L_0000023deb5fe2d0;  alias, 1 drivers
L_0000023deb5b1100 .part L_0000023deb5fecd0, 2, 6;
L_0000023deb5b0700 .part L_0000023deb5fecd0, 0, 2;
L_0000023deb5b0980 .concat [ 6 1 0 0], L_0000023deb5b1100, L_0000023deb5b2128;
L_0000023deb5b0a20 .concat [ 2 5 0 0], L_0000023deb5b0700, L_0000023deb5b2170;
L_0000023deb5fed70 .arith/sum 7, L_0000023deb5b0980, L_0000023deb5b0a20;
L_0000023deb5fef50 .part L_0000023deb5fed70, 2, 5;
L_0000023deb5ffd10 .part L_0000023deb5fed70, 0, 2;
L_0000023deb5fe9b0 .concat [ 5 1 0 0], L_0000023deb5fef50, L_0000023deb5b21b8;
L_0000023deb5fe7d0 .concat [ 2 4 0 0], L_0000023deb5ffd10, L_0000023deb5b2200;
L_0000023deb5ff3b0 .arith/sum 6, L_0000023deb5fe9b0, L_0000023deb5fe7d0;
L_0000023deb5fe870 .part L_0000023deb5ff3b0, 2, 4;
L_0000023deb5ffb30 .part L_0000023deb5ff3b0, 0, 2;
L_0000023deb5ff950 .concat [ 4 1 0 0], L_0000023deb5fe870, L_0000023deb5b2248;
L_0000023deb5ff590 .concat [ 2 3 0 0], L_0000023deb5ffb30, L_0000023deb5b2290;
L_0000023deb5ff090 .arith/sum 5, L_0000023deb5ff950, L_0000023deb5ff590;
L_0000023deb5ff130 .part L_0000023deb5ff090, 2, 3;
L_0000023deb5ff1d0 .part L_0000023deb5ff130, 0, 2;
L_0000023deb5ffef0 .part L_0000023deb5ff090, 0, 2;
L_0000023deb5fec30 .arith/sum 2, L_0000023deb5ff1d0, L_0000023deb5ffef0;
L_0000023deb5feb90 .concat [ 6 2 0 0], L_0000023deb5b1100, L_0000023deb5b22d8;
L_0000023deb5ffdb0 .concat [ 5 3 0 0], L_0000023deb5fef50, L_0000023deb5b2320;
L_0000023deb5fe370 .arith/sum 8, L_0000023deb5feb90, L_0000023deb5ffdb0;
L_0000023deb5ff450 .concat [ 4 4 0 0], L_0000023deb5fe870, L_0000023deb5b2368;
L_0000023deb5fea50 .arith/sum 8, L_0000023deb5fe370, L_0000023deb5ff450;
L_0000023deb5ff770 .concat [ 2 6 0 0], L_0000023deb5ff1d0, L_0000023deb5b23b0;
L_0000023deb5fe190 .arith/sum 8, L_0000023deb5fea50, L_0000023deb5ff770;
L_0000023deb5feeb0 .cmp/eq 2, L_0000023deb5fec30, L_0000023deb5b23f8;
L_0000023deb5ff270 .arith/sum 8, L_0000023deb5fe190, L_0000023deb5b2440;
L_0000023deb5fee10 .functor MUXZ 8, L_0000023deb5fe190, L_0000023deb5ff270, L_0000023deb5feeb0, C4<>;
L_0000023deb5fff90 .cmp/eq 2, L_0000023deb5fec30, L_0000023deb5b2488;
L_0000023deb5fe2d0 .functor MUXZ 2, L_0000023deb5fec30, L_0000023deb5b24d0, L_0000023deb5fff90, C4<>;
S_0000023deb4cf6d0 .scope module, "div7_inst" "div_mod_7" 5 58, 7 14 0, S_0000023deb4af0a0;
 .timescale 0 0;
    .port_info 0 /INPUT 9 "n";
    .port_info 1 /OUTPUT 9 "quotient";
    .port_info 2 /OUTPUT 3 "remainder";
L_0000023deb5b2560 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v0000023deb5ad900_0 .net *"_ivl_11", 3 0, L_0000023deb5b2560;  1 drivers
v0000023deb5ad860_0 .net *"_ivl_18", 4 0, L_0000023deb5ff630;  1 drivers
L_0000023deb5b25a8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000023deb5acc80_0 .net *"_ivl_21", 0 0, L_0000023deb5b25a8;  1 drivers
v0000023deb5adae0_0 .net *"_ivl_22", 4 0, L_0000023deb5ff4f0;  1 drivers
L_0000023deb5b25f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0000023deb5adcc0_0 .net *"_ivl_25", 1 0, L_0000023deb5b25f0;  1 drivers
v0000023deb5ad2c0_0 .net *"_ivl_32", 2 0, L_0000023deb5fe5f0;  1 drivers
L_0000023deb5b2638 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000023deb5adfe0_0 .net *"_ivl_35", 0 0, L_0000023deb5b2638;  1 drivers
v0000023deb5acf00_0 .net *"_ivl_38", 7 0, L_0000023deb5ff9f0;  1 drivers
v0000023deb5acaa0_0 .net *"_ivl_4", 6 0, L_0000023deb5feff0;  1 drivers
L_0000023deb5b2680 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0000023deb5acfa0_0 .net *"_ivl_41", 1 0, L_0000023deb5b2680;  1 drivers
v0000023deb5ad0e0_0 .net *"_ivl_42", 7 0, L_0000023deb5fe4b0;  1 drivers
L_0000023deb5b26c8 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v0000023deb5ad180_0 .net *"_ivl_45", 3 0, L_0000023deb5b26c8;  1 drivers
v0000023deb5ae3d0_0 .net *"_ivl_46", 7 0, L_0000023deb5fe550;  1 drivers
v0000023deb5aec90_0 .net *"_ivl_48", 7 0, L_0000023deb5ffa90;  1 drivers
L_0000023deb5b2710 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v0000023deb5aeab0_0 .net *"_ivl_51", 5 0, L_0000023deb5b2710;  1 drivers
L_0000023deb5b2758 .functor BUFT 1, C4<111>, C4<0>, C4<0>, C4<0>;
v0000023deb5afe10_0 .net/2u *"_ivl_54", 2 0, L_0000023deb5b2758;  1 drivers
v0000023deb5af690_0 .net *"_ivl_56", 0 0, L_0000023deb5fe730;  1 drivers
v0000023deb5af410_0 .net *"_ivl_58", 8 0, L_0000023deb5ffc70;  1 drivers
L_0000023deb5b27a0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000023deb5afa50_0 .net *"_ivl_61", 0 0, L_0000023deb5b27a0;  1 drivers
L_0000023deb5b27e8 .functor BUFT 1, C4<000000001>, C4<0>, C4<0>, C4<0>;
v0000023deb5aefb0_0 .net/2u *"_ivl_62", 8 0, L_0000023deb5b27e8;  1 drivers
v0000023deb5af5f0_0 .net *"_ivl_64", 8 0, L_0000023deb5ffe50;  1 drivers
v0000023deb5ae6f0_0 .net *"_ivl_66", 8 0, L_0000023deb600880;  1 drivers
L_0000023deb5b2830 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000023deb5af230_0 .net *"_ivl_69", 0 0, L_0000023deb5b2830;  1 drivers
L_0000023deb5b2518 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000023deb5aed30_0 .net *"_ivl_7", 0 0, L_0000023deb5b2518;  1 drivers
L_0000023deb5b2878 .functor BUFT 1, C4<111>, C4<0>, C4<0>, C4<0>;
v0000023deb5ae510_0 .net/2u *"_ivl_72", 2 0, L_0000023deb5b2878;  1 drivers
v0000023deb5af7d0_0 .net *"_ivl_74", 0 0, L_0000023deb6001a0;  1 drivers
L_0000023deb5b28c0 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v0000023deb5ae1f0_0 .net/2u *"_ivl_76", 2 0, L_0000023deb5b28c0;  1 drivers
v0000023deb5ae790_0 .net *"_ivl_8", 6 0, L_0000023deb5fe410;  1 drivers
v0000023deb5af9b0_0 .net "n", 8 0, L_0000023deb6013c0;  1 drivers
v0000023deb5af870_0 .net "q1", 5 0, L_0000023deb5fe230;  1 drivers
v0000023deb5ae290_0 .net "q2", 3 0, L_0000023deb5ff310;  1 drivers
v0000023deb5af730_0 .net "q3", 1 0, L_0000023deb5ffbd0;  1 drivers
v0000023deb5aedd0_0 .net "quotient", 8 0, L_0000023deb600ba0;  alias, 1 drivers
v0000023deb5af910_0 .net "quotient_sum", 7 0, L_0000023deb5fe910;  1 drivers
v0000023deb5aeb50_0 .net "r1", 2 0, L_0000023deb5feaf0;  1 drivers
v0000023deb5afaf0_0 .net "r2", 2 0, L_0000023deb600030;  1 drivers
v0000023deb5aee70_0 .net "r3", 2 0, L_0000023deb5fe690;  1 drivers
v0000023deb5aef10_0 .net "rem1", 6 0, L_0000023deb5ff6d0;  1 drivers
v0000023deb5af050_0 .net "rem2", 4 0, L_0000023deb5ff810;  1 drivers
v0000023deb5af4b0_0 .net "rem3", 2 0, L_0000023deb5ff8b0;  1 drivers
v0000023deb5af0f0_0 .net "remainder", 2 0, L_0000023deb601b40;  alias, 1 drivers
L_0000023deb5fe230 .part L_0000023deb6013c0, 3, 6;
L_0000023deb5feaf0 .part L_0000023deb6013c0, 0, 3;
L_0000023deb5feff0 .concat [ 6 1 0 0], L_0000023deb5fe230, L_0000023deb5b2518;
L_0000023deb5fe410 .concat [ 3 4 0 0], L_0000023deb5feaf0, L_0000023deb5b2560;
L_0000023deb5ff6d0 .arith/sum 7, L_0000023deb5feff0, L_0000023deb5fe410;
L_0000023deb5ff310 .part L_0000023deb5ff6d0, 3, 4;
L_0000023deb600030 .part L_0000023deb5ff6d0, 0, 3;
L_0000023deb5ff630 .concat [ 4 1 0 0], L_0000023deb5ff310, L_0000023deb5b25a8;
L_0000023deb5ff4f0 .concat [ 3 2 0 0], L_0000023deb600030, L_0000023deb5b25f0;
L_0000023deb5ff810 .arith/sum 5, L_0000023deb5ff630, L_0000023deb5ff4f0;
L_0000023deb5ffbd0 .part L_0000023deb5ff810, 3, 2;
L_0000023deb5fe690 .part L_0000023deb5ff810, 0, 3;
L_0000023deb5fe5f0 .concat [ 2 1 0 0], L_0000023deb5ffbd0, L_0000023deb5b2638;
L_0000023deb5ff8b0 .arith/sum 3, L_0000023deb5fe5f0, L_0000023deb5fe690;
L_0000023deb5ff9f0 .concat [ 6 2 0 0], L_0000023deb5fe230, L_0000023deb5b2680;
L_0000023deb5fe4b0 .concat [ 4 4 0 0], L_0000023deb5ff310, L_0000023deb5b26c8;
L_0000023deb5fe550 .arith/sum 8, L_0000023deb5ff9f0, L_0000023deb5fe4b0;
L_0000023deb5ffa90 .concat [ 2 6 0 0], L_0000023deb5ffbd0, L_0000023deb5b2710;
L_0000023deb5fe910 .arith/sum 8, L_0000023deb5fe550, L_0000023deb5ffa90;
L_0000023deb5fe730 .cmp/eq 3, L_0000023deb5ff8b0, L_0000023deb5b2758;
L_0000023deb5ffc70 .concat [ 8 1 0 0], L_0000023deb5fe910, L_0000023deb5b27a0;
L_0000023deb5ffe50 .arith/sum 9, L_0000023deb5ffc70, L_0000023deb5b27e8;
L_0000023deb600880 .concat [ 8 1 0 0], L_0000023deb5fe910, L_0000023deb5b2830;
L_0000023deb600ba0 .functor MUXZ 9, L_0000023deb600880, L_0000023deb5ffe50, L_0000023deb5fe730, C4<>;
L_0000023deb6001a0 .cmp/eq 3, L_0000023deb5ff8b0, L_0000023deb5b2878;
L_0000023deb601b40 .functor MUXZ 3, L_0000023deb5ff8b0, L_0000023deb5b28c0, L_0000023deb6001a0, C4<>;
S_0000023deb4ec990 .scope task, "run_test" "run_test" 2 148, 2 148 0, S_0000023deb553610;
 .timescale -9 -12;
v0000023deb5b2000_0 .var "base_val", 1 0;
v0000023deb5b1e20_0 .var "expected_x", 31 0;
v0000023deb5b1ba0_0 .var "expected_y", 31 0;
v0000023deb5b1920_0 .var "k_val", 31 0;
E_0000023deb543bd0 .event posedge, v0000023deb52a470_0;
E_0000023deb543c50 .event anyedge, v0000023deb5b0c00_0;
E_0000023deb543850 .event anyedge, v0000023deb5b0e80_0;
TD_circle_fsm_32bit_simple_fixed_tb.run_test ;
T_0.0 ;
    %load/vec4 v0000023deb5b0ca0_0;
    %pushi/vec4 1, 0, 1;
    %cmp/e;
    %flag_get/vec4 4;
    %cmpi/ne 1, 0, 1;
    %jmp/0xz T_0.1, 6;
    %wait E_0000023deb543850;
    %jmp T_0.0;
T_0.1 ;
    %wait E_0000023deb543bd0;
    %load/vec4 v0000023deb5b1920_0;
    %store/vec4 v0000023deb5b1060_0, 0, 32;
    %load/vec4 v0000023deb5b2000_0;
    %store/vec4 v0000023deb5b1ec0_0, 0, 2;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0000023deb5b0160_0, 0, 1;
    %wait E_0000023deb543bd0;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0000023deb5b0160_0, 0, 1;
T_0.2 ;
    %load/vec4 v0000023deb5b0b60_0;
    %pushi/vec4 1, 0, 1;
    %cmp/e;
    %flag_get/vec4 4;
    %cmpi/ne 1, 0, 1;
    %jmp/0xz T_0.3, 6;
    %wait E_0000023deb543c50;
    %jmp T_0.2;
T_0.3 ;
    %wait E_0000023deb543bd0;
    %load/vec4 v0000023deb5b1e20_0;
    %subi 4096, 0, 32;
    %load/vec4 v0000023deb5b1380_0;
    %cmp/u;
    %flag_or 5, 4;
    %flag_get/vec4 5;
    %jmp/0 T_0.8, 5;
    %load/vec4 v0000023deb5b1380_0;
    %load/vec4 v0000023deb5b1e20_0;
    %addi 4096, 0, 32;
    %cmp/u;
    %flag_get/vec4 4;
    %flag_get/vec4 5;
    %or;
    %and;
T_0.8;
    %flag_set/vec4 10;
    %flag_get/vec4 10;
    %jmp/0 T_0.7, 10;
    %load/vec4 v0000023deb5b1ba0_0;
    %subi 4096, 0, 32;
    %load/vec4 v0000023deb5b0480_0;
    %cmp/u;
    %flag_get/vec4 4;
    %flag_get/vec4 5;
    %or;
    %and;
T_0.7;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_0.6, 9;
    %load/vec4 v0000023deb5b0480_0;
    %load/vec4 v0000023deb5b1ba0_0;
    %addi 4096, 0, 32;
    %cmp/u;
    %flag_get/vec4 4;
    %flag_get/vec4 5;
    %or;
    %and;
T_0.6;
    %flag_set/vec4 8;
    %jmp/0xz  T_0.4, 8;
    %vpi_call 2 173 "$display", "PASS: count=%0d, base_sel=%b, x=0x%08h, y=0x%08h", v0000023deb5b1920_0, v0000023deb5b2000_0, v0000023deb5b1380_0, v0000023deb5b0480_0 {0 0 0};
    %load/vec4 v0000023deb5b0660_0;
    %addi 1, 0, 32;
    %store/vec4 v0000023deb5b0660_0, 0, 32;
    %jmp T_0.5;
T_0.4 ;
    %vpi_call 2 177 "$display", "FAIL: count=%0d, base_sel=%b", v0000023deb5b1920_0, v0000023deb5b2000_0 {0 0 0};
    %vpi_call 2 178 "$display", "  Expected: x=0x%08h, y=0x%08h", v0000023deb5b1e20_0, v0000023deb5b1ba0_0 {0 0 0};
    %vpi_call 2 179 "$display", "  Got:      x=0x%08h, y=0x%08h", v0000023deb5b1380_0, v0000023deb5b0480_0 {0 0 0};
    %load/vec4 v0000023deb5b1560_0;
    %addi 1, 0, 32;
    %store/vec4 v0000023deb5b1560_0, 0, 32;
    %load/vec4 v0000023deb5b03e0_0;
    %addi 1, 0, 32;
    %store/vec4 v0000023deb5b03e0_0, 0, 32;
T_0.5 ;
    %load/vec4 v0000023deb5b14c0_0;
    %addi 1, 0, 32;
    %store/vec4 v0000023deb5b14c0_0, 0, 32;
    %end;
    .scope S_0000023deb4af0a0;
T_1 ;
    %wait E_0000023deb5437d0;
    %load/vec4 v0000023deb5ae650_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_1.0, 8;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v0000023deb5ae150_0, 0;
    %jmp T_1.1;
T_1.0 ;
    %load/vec4 v0000023deb5afcd0_0;
    %assign/vec4 v0000023deb5ae150_0, 0;
T_1.1 ;
    %jmp T_1;
    .thread T_1;
    .scope S_0000023deb4af0a0;
T_2 ;
    %wait E_0000023deb5444d0;
    %load/vec4 v0000023deb5ae150_0;
    %store/vec4 v0000023deb5afcd0_0, 0, 3;
    %load/vec4 v0000023deb5ae150_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_2.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_2.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_2.2, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_2.3, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_2.4, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_2.5, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 3;
    %cmp/u;
    %jmp/1 T_2.6, 6;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v0000023deb5afcd0_0, 0, 3;
    %jmp T_2.8;
T_2.0 ;
    %load/vec4 v0000023deb5ae970_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_2.9, 8;
    %pushi/vec4 1, 0, 3;
    %store/vec4 v0000023deb5afcd0_0, 0, 3;
T_2.9 ;
    %jmp T_2.8;
T_2.1 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v0000023deb5afcd0_0, 0, 3;
    %jmp T_2.8;
T_2.2 ;
    %pushi/vec4 3, 0, 3;
    %store/vec4 v0000023deb5afcd0_0, 0, 3;
    %jmp T_2.8;
T_2.3 ;
    %pushi/vec4 4, 0, 3;
    %store/vec4 v0000023deb5afcd0_0, 0, 3;
    %jmp T_2.8;
T_2.4 ;
    %pushi/vec4 5, 0, 3;
    %store/vec4 v0000023deb5afcd0_0, 0, 3;
    %jmp T_2.8;
T_2.5 ;
    %load/vec4 v0000023deb5ae470_0;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_2.11, 4;
    %pushi/vec4 6, 0, 3;
    %store/vec4 v0000023deb5afcd0_0, 0, 3;
    %jmp T_2.12;
T_2.11 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v0000023deb5afcd0_0, 0, 3;
T_2.12 ;
    %jmp T_2.8;
T_2.6 ;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v0000023deb5afcd0_0, 0, 3;
    %jmp T_2.8;
T_2.8 ;
    %pop/vec4 1;
    %jmp T_2;
    .thread T_2, $push;
    .scope S_0000023deb4af0a0;
T_3 ;
    %wait E_0000023deb5437d0;
    %load/vec4 v0000023deb5ae650_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5ae470_0, 0;
    %pushi/vec4 65536, 0, 32;
    %assign/vec4 v0000023deb5af2d0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5afb90_0, 0;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v0000023deb5afc30_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5ae5b0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5afd70_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5aebf0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5af550_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb5afff0_0, 0;
    %jmp T_3.1;
T_3.0 ;
    %load/vec4 v0000023deb5ae150_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_3.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_3.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_3.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_3.5, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_3.6, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_3.7, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 3;
    %cmp/u;
    %jmp/1 T_3.8, 6;
    %jmp T_3.9;
T_3.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb5afff0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5af550_0, 0;
    %load/vec4 v0000023deb5ae970_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.10, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5afff0_0, 0;
    %load/vec4 v0000023deb5af190_0;
    %assign/vec4 v0000023deb5ae470_0, 0;
T_3.10 ;
    %jmp T_3.9;
T_3.3 ;
    %load/vec4 v0000023deb5ae330_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_3.12, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_3.13, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_3.14, 6;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v0000023deb5afc30_0, 0;
    %pushi/vec4 32768, 0, 32;
    %assign/vec4 v0000023deb5af2d0_0, 0;
    %jmp T_3.16;
T_3.12 ;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v0000023deb5afc30_0, 0;
    %pushi/vec4 32768, 0, 32;
    %assign/vec4 v0000023deb5af2d0_0, 0;
    %jmp T_3.16;
T_3.13 ;
    %pushi/vec4 3, 0, 32;
    %assign/vec4 v0000023deb5afc30_0, 0;
    %pushi/vec4 21845, 0, 32;
    %assign/vec4 v0000023deb5af2d0_0, 0;
    %jmp T_3.16;
T_3.14 ;
    %pushi/vec4 7, 0, 32;
    %assign/vec4 v0000023deb5afc30_0, 0;
    %pushi/vec4 9362, 0, 32;
    %assign/vec4 v0000023deb5af2d0_0, 0;
    %jmp T_3.16;
T_3.16 ;
    %pop/vec4 1;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5afb90_0, 0;
    %jmp T_3.9;
T_3.4 ;
    %load/vec4 v0000023deb5afc30_0;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_3.17, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 32;
    %cmp/u;
    %jmp/1 T_3.18, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 32;
    %cmp/u;
    %jmp/1 T_3.19, 6;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5afd70_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5ae5b0_0, 0;
    %jmp T_3.21;
T_3.17 ;
    %load/vec4 v0000023deb5ae470_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v0000023deb5afd70_0, 0;
    %load/vec4 v0000023deb5ae470_0;
    %parti/s 1, 0, 2;
    %pad/u 32;
    %assign/vec4 v0000023deb5ae5b0_0, 0;
    %jmp T_3.21;
T_3.18 ;
    %pushi/vec4 0, 0, 24;
    %load/vec4 v0000023deb5ae830_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v0000023deb5afd70_0, 0;
    %pushi/vec4 0, 0, 30;
    %load/vec4 v0000023deb5aff50_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v0000023deb5ae5b0_0, 0;
    %jmp T_3.21;
T_3.19 ;
    %pushi/vec4 0, 0, 23;
    %load/vec4 v0000023deb5af370_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v0000023deb5afd70_0, 0;
    %pushi/vec4 0, 0, 29;
    %load/vec4 v0000023deb5ae8d0_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v0000023deb5ae5b0_0, 0;
    %jmp T_3.21;
T_3.21 ;
    %pop/vec4 1;
    %jmp T_3.9;
T_3.5 ;
    %load/vec4 v0000023deb5ae5b0_0;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_3.22, 4;
    %load/vec4 v0000023deb5afb90_0;
    %load/vec4 v0000023deb5ae5b0_0;
    %load/vec4 v0000023deb5af2d0_0;
    %mul;
    %add;
    %assign/vec4 v0000023deb5afb90_0, 0;
T_3.22 ;
    %jmp T_3.9;
T_3.6 ;
    %load/vec4 v0000023deb5afd70_0;
    %assign/vec4 v0000023deb5ae470_0, 0;
    %load/vec4 v0000023deb5afc30_0;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_3.24, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 32;
    %cmp/u;
    %jmp/1 T_3.25, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 32;
    %cmp/u;
    %jmp/1 T_3.26, 6;
    %jmp T_3.27;
T_3.24 ;
    %load/vec4 v0000023deb5af2d0_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v0000023deb5af2d0_0, 0;
    %jmp T_3.27;
T_3.25 ;
    %load/vec4 v0000023deb5af2d0_0;
    %muli 21845, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v0000023deb5af2d0_0, 0;
    %jmp T_3.27;
T_3.26 ;
    %load/vec4 v0000023deb5af2d0_0;
    %muli 9362, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v0000023deb5af2d0_0, 0;
    %jmp T_3.27;
T_3.27 ;
    %pop/vec4 1;
    %jmp T_3.9;
T_3.7 ;
    %jmp T_3.9;
T_3.8 ;
    %load/vec4 v0000023deb5afb90_0;
    %assign/vec4 v0000023deb5aebf0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb5af550_0, 0;
    %jmp T_3.9;
T_3.9 ;
    %pop/vec4 1;
T_3.1 ;
    %jmp T_3;
    .thread T_3;
    .scope S_0000023deb557d30;
T_4 ;
    %pushi/vec4 8192, 0, 16;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 4836, 0, 16;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 2555, 0, 16;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 1297, 0, 16;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 651, 0, 16;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 326, 0, 16;
    %ix/load 4, 5, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 163, 0, 16;
    %ix/load 4, 6, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 81, 0, 16;
    %ix/load 4, 7, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 41, 0, 16;
    %ix/load 4, 8, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 20, 0, 16;
    %ix/load 4, 9, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 10, 0, 16;
    %ix/load 4, 10, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 5, 0, 16;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 3, 0, 16;
    %ix/load 4, 12, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 1, 0, 16;
    %ix/load 4, 13, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 1, 0, 16;
    %ix/load 4, 14, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %pushi/vec4 0, 0, 16;
    %ix/load 4, 15, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb529d90, 4, 0;
    %end;
    .thread T_4;
    .scope S_0000023deb557d30;
T_5 ;
    %wait E_0000023deb5437d0;
    %load/vec4 v0000023deb52a790_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_5.0, 8;
    %pushi/vec4 0, 0, 2;
    %assign/vec4 v0000023deb529f70_0, 0;
    %jmp T_5.1;
T_5.0 ;
    %load/vec4 v0000023deb52abf0_0;
    %assign/vec4 v0000023deb529f70_0, 0;
T_5.1 ;
    %jmp T_5;
    .thread T_5;
    .scope S_0000023deb557d30;
T_6 ;
    %wait E_0000023deb543ed0;
    %load/vec4 v0000023deb529f70_0;
    %store/vec4 v0000023deb52abf0_0, 0, 2;
    %load/vec4 v0000023deb529f70_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_6.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_6.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_6.2, 6;
    %jmp T_6.3;
T_6.0 ;
    %load/vec4 v0000023deb52aa10_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_6.4, 8;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v0000023deb52abf0_0, 0, 2;
T_6.4 ;
    %jmp T_6.3;
T_6.1 ;
    %load/vec4 v0000023deb529570_0;
    %pad/u 32;
    %cmpi/e 15, 0, 32;
    %jmp/0xz  T_6.6, 4;
    %pushi/vec4 2, 0, 2;
    %store/vec4 v0000023deb52abf0_0, 0, 2;
T_6.6 ;
    %jmp T_6.3;
T_6.2 ;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v0000023deb52abf0_0, 0, 2;
    %jmp T_6.3;
T_6.3 ;
    %pop/vec4 1;
    %jmp T_6;
    .thread T_6, $push;
    .scope S_0000023deb557d30;
T_7 ;
    %wait E_0000023deb5437d0;
    %load/vec4 v0000023deb52a790_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.0, 8;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v0000023deb52a5b0_0, 0;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v0000023deb5291b0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0000023deb52aab0_0, 0;
    %pushi/vec4 0, 0, 4;
    %assign/vec4 v0000023deb529570_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb52a290_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb529e30_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb529cf0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb52a330_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0000023deb5296b0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb52a650_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb52a8d0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb529b10_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb52ab50_0, 0;
    %jmp T_7.1;
T_7.0 ;
    %load/vec4 v0000023deb529f70_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_7.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_7.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_7.4, 6;
    %jmp T_7.5;
T_7.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb52a330_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb529cf0_0, 0;
    %load/vec4 v0000023deb52aa10_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.6, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb52a330_0, 0;
    %load/vec4 v0000023deb52a0b0_0;
    %assign/vec4 v0000023deb529a70_0, 0;
    %load/vec4 v0000023deb52a0b0_0;
    %pad/u 32;
    %cmpi/u 16384, 0, 32;
    %jmp/0xz  T_7.8, 5;
    %load/vec4 v0000023deb52a0b0_0;
    %store/vec4 v0000023deb5296b0_0, 0, 16;
    %pushi/vec4 39797, 0, 17;
    %assign/vec4 v0000023deb52a5b0_0, 0;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v0000023deb5291b0_0, 0;
    %jmp T_7.9;
T_7.8 ;
    %load/vec4 v0000023deb52a0b0_0;
    %pad/u 32;
    %cmpi/u 32768, 0, 32;
    %jmp/0xz  T_7.10, 5;
    %load/vec4 v0000023deb52a0b0_0;
    %subi 16384, 0, 16;
    %store/vec4 v0000023deb5296b0_0, 0, 16;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v0000023deb52a5b0_0, 0;
    %pushi/vec4 39797, 0, 17;
    %assign/vec4 v0000023deb5291b0_0, 0;
    %jmp T_7.11;
T_7.10 ;
    %load/vec4 v0000023deb52a0b0_0;
    %pad/u 32;
    %cmpi/u 49152, 0, 32;
    %jmp/0xz  T_7.12, 5;
    %load/vec4 v0000023deb52a0b0_0;
    %subi 32768, 0, 16;
    %store/vec4 v0000023deb5296b0_0, 0, 16;
    %pushi/vec4 91275, 0, 17;
    %assign/vec4 v0000023deb52a5b0_0, 0;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v0000023deb5291b0_0, 0;
    %jmp T_7.13;
T_7.12 ;
    %load/vec4 v0000023deb52a0b0_0;
    %subi 49152, 0, 16;
    %store/vec4 v0000023deb5296b0_0, 0, 16;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v0000023deb52a5b0_0, 0;
    %pushi/vec4 91275, 0, 17;
    %assign/vec4 v0000023deb5291b0_0, 0;
T_7.13 ;
T_7.11 ;
T_7.9 ;
    %load/vec4 v0000023deb5296b0_0;
    %assign/vec4 v0000023deb52aab0_0, 0;
    %pushi/vec4 0, 0, 4;
    %assign/vec4 v0000023deb529570_0, 0;
T_7.6 ;
    %jmp T_7.5;
T_7.3 ;
    %load/vec4 v0000023deb52aab0_0;
    %parti/s 1, 15, 5;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.14, 8;
    %load/vec4 v0000023deb52a5b0_0;
    %load/vec4 v0000023deb5291b0_0;
    %ix/getv 4, v0000023deb529570_0;
    %shiftr 4;
    %add;
    %assign/vec4 v0000023deb52a5b0_0, 0;
    %load/vec4 v0000023deb5291b0_0;
    %load/vec4 v0000023deb52a5b0_0;
    %ix/getv 4, v0000023deb529570_0;
    %shiftr 4;
    %sub;
    %assign/vec4 v0000023deb5291b0_0, 0;
    %load/vec4 v0000023deb52aab0_0;
    %load/vec4 v0000023deb529570_0;
    %pad/u 6;
    %ix/vec4 4;
    %load/vec4a v0000023deb529d90, 4;
    %add;
    %assign/vec4 v0000023deb52aab0_0, 0;
    %jmp T_7.15;
T_7.14 ;
    %load/vec4 v0000023deb52a5b0_0;
    %load/vec4 v0000023deb5291b0_0;
    %ix/getv 4, v0000023deb529570_0;
    %shiftr 4;
    %sub;
    %assign/vec4 v0000023deb52a5b0_0, 0;
    %load/vec4 v0000023deb5291b0_0;
    %load/vec4 v0000023deb52a5b0_0;
    %ix/getv 4, v0000023deb529570_0;
    %shiftr 4;
    %add;
    %assign/vec4 v0000023deb5291b0_0, 0;
    %load/vec4 v0000023deb52aab0_0;
    %load/vec4 v0000023deb529570_0;
    %pad/u 6;
    %ix/vec4 4;
    %load/vec4a v0000023deb529d90, 4;
    %sub;
    %assign/vec4 v0000023deb52aab0_0, 0;
T_7.15 ;
    %load/vec4 v0000023deb529570_0;
    %addi 1, 0, 4;
    %assign/vec4 v0000023deb529570_0, 0;
    %jmp T_7.5;
T_7.4 ;
    %load/vec4 v0000023deb52a5b0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %load/vec4 v0000023deb52a5b0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v0000023deb52a5b0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v0000023deb52a5b0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 6, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %store/vec4 v0000023deb52a650_0, 0, 32;
    %load/vec4 v0000023deb5291b0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %load/vec4 v0000023deb5291b0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v0000023deb5291b0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v0000023deb5291b0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 6, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %store/vec4 v0000023deb52a8d0_0, 0, 32;
    %load/vec4 v0000023deb529a70_0;
    %pad/u 32;
    %cmpi/u 16384, 0, 32;
    %jmp/0xz  T_7.16, 5;
    %load/vec4 v0000023deb52a650_0;
    %store/vec4 v0000023deb529b10_0, 0, 32;
    %load/vec4 v0000023deb52a8d0_0;
    %store/vec4 v0000023deb52ab50_0, 0, 32;
    %jmp T_7.17;
T_7.16 ;
    %load/vec4 v0000023deb529a70_0;
    %pad/u 32;
    %cmpi/u 32768, 0, 32;
    %jmp/0xz  T_7.18, 5;
    %load/vec4 v0000023deb52a8d0_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v0000023deb529b10_0, 0, 32;
    %load/vec4 v0000023deb52a650_0;
    %store/vec4 v0000023deb52ab50_0, 0, 32;
    %jmp T_7.19;
T_7.18 ;
    %load/vec4 v0000023deb529a70_0;
    %pad/u 32;
    %cmpi/u 49152, 0, 32;
    %jmp/0xz  T_7.20, 5;
    %load/vec4 v0000023deb52a650_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v0000023deb529b10_0, 0, 32;
    %load/vec4 v0000023deb52a8d0_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v0000023deb52ab50_0, 0, 32;
    %jmp T_7.21;
T_7.20 ;
    %load/vec4 v0000023deb52a8d0_0;
    %store/vec4 v0000023deb529b10_0, 0, 32;
    %load/vec4 v0000023deb52a650_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v0000023deb52ab50_0, 0, 32;
T_7.21 ;
T_7.19 ;
T_7.17 ;
    %load/vec4 v0000023deb529b10_0;
    %assign/vec4 v0000023deb52a290_0, 0;
    %load/vec4 v0000023deb52ab50_0;
    %assign/vec4 v0000023deb529e30_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb529cf0_0, 0;
    %jmp T_7.5;
T_7.5 ;
    %pop/vec4 1;
T_7.1 ;
    %jmp T_7;
    .thread T_7;
    .scope S_0000023deb556230;
T_8 ;
    %wait E_0000023deb5437d0;
    %load/vec4 v0000023deb5b07a0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_8.0, 8;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v0000023deb5b0de0_0, 0;
    %jmp T_8.1;
T_8.0 ;
    %load/vec4 v0000023deb5b1420_0;
    %assign/vec4 v0000023deb5b0de0_0, 0;
T_8.1 ;
    %jmp T_8;
    .thread T_8;
    .scope S_0000023deb556230;
T_9 ;
    %wait E_0000023deb543fd0;
    %load/vec4 v0000023deb5b0de0_0;
    %store/vec4 v0000023deb5b1420_0, 0, 3;
    %load/vec4 v0000023deb5b0de0_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_9.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_9.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_9.2, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_9.3, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_9.4, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_9.5, 6;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v0000023deb5b1420_0, 0, 3;
    %jmp T_9.7;
T_9.0 ;
    %load/vec4 v0000023deb5b1600_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_9.8, 8;
    %pushi/vec4 1, 0, 3;
    %store/vec4 v0000023deb5b1420_0, 0, 3;
T_9.8 ;
    %jmp T_9.7;
T_9.1 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v0000023deb5b1420_0, 0, 3;
    %jmp T_9.7;
T_9.2 ;
    %load/vec4 v0000023deb5b0ac0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_9.10, 8;
    %pushi/vec4 3, 0, 3;
    %store/vec4 v0000023deb5b1420_0, 0, 3;
T_9.10 ;
    %jmp T_9.7;
T_9.3 ;
    %pushi/vec4 4, 0, 3;
    %store/vec4 v0000023deb5b1420_0, 0, 3;
    %jmp T_9.7;
T_9.4 ;
    %load/vec4 v0000023deb5b1880_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_9.12, 8;
    %pushi/vec4 5, 0, 3;
    %store/vec4 v0000023deb5b1420_0, 0, 3;
T_9.12 ;
    %jmp T_9.7;
T_9.5 ;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v0000023deb5b1420_0, 0, 3;
    %jmp T_9.7;
T_9.7 ;
    %pop/vec4 1;
    %jmp T_9;
    .thread T_9, $push;
    .scope S_0000023deb556230;
T_10 ;
    %wait E_0000023deb5437d0;
    %load/vec4 v0000023deb5b07a0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_10.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5b17e0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5b19c0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5b11a0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5aea10_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v0000023deb5b1c40_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5b1d80_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0000023deb5b0200_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5b0c00_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb5b0e80_0, 0;
    %jmp T_10.1;
T_10.0 ;
    %load/vec4 v0000023deb5b0de0_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_10.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_10.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_10.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_10.5, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_10.6, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_10.7, 6;
    %jmp T_10.8;
T_10.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb5b0e80_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5b0c00_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5b19c0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5b11a0_0, 0;
    %load/vec4 v0000023deb5b1600_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_10.9, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5b0e80_0, 0;
    %load/vec4 v0000023deb5b1ce0_0;
    %assign/vec4 v0000023deb5b17e0_0, 0;
T_10.9 ;
    %jmp T_10.8;
T_10.3 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb5b19c0_0, 0;
    %jmp T_10.8;
T_10.4 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5b19c0_0, 0;
    %load/vec4 v0000023deb5b0ac0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_10.11, 8;
    %load/vec4 v0000023deb5b0f20_0;
    %muli 411775, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v0000023deb5aea10_0, 0;
    %load/vec4 v0000023deb5aea10_0;
    %parti/s 16, 16, 6;
    %assign/vec4 v0000023deb5b1c40_0, 0;
T_10.11 ;
    %jmp T_10.8;
T_10.5 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb5b11a0_0, 0;
    %jmp T_10.8;
T_10.6 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0000023deb5b11a0_0, 0;
    %jmp T_10.8;
T_10.7 ;
    %load/vec4 v0000023deb5b12e0_0;
    %assign/vec4 v0000023deb5b1d80_0, 0;
    %load/vec4 v0000023deb5b0fc0_0;
    %assign/vec4 v0000023deb5b0200_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0000023deb5b0c00_0, 0;
    %jmp T_10.8;
T_10.8 ;
    %pop/vec4 1;
T_10.1 ;
    %jmp T_10;
    .thread T_10;
    .scope S_0000023deb553610;
T_11 ;
    %delay 5000, 0;
    %load/vec4 v0000023deb5b0340_0;
    %inv;
    %store/vec4 v0000023deb5b0340_0, 0, 1;
    %jmp T_11;
    .thread T_11;
    .scope S_0000023deb553610;
T_12 ;
    %pushi/vec4 1, 0, 32;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b05c0, 4, 0;
    %pushi/vec4 2, 0, 32;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b05c0, 4, 0;
    %pushi/vec4 3, 0, 32;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b05c0, 4, 0;
    %pushi/vec4 4, 0, 32;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b05c0, 4, 0;
    %pushi/vec4 5, 0, 32;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b05c0, 4, 0;
    %pushi/vec4 4294901760, 0, 32;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1f60, 4, 0;
    %pushi/vec4 0, 0, 32;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b16a0, 4, 0;
    %pushi/vec4 0, 0, 32;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1f60, 4, 0;
    %pushi/vec4 65536, 0, 32;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b16a0, 4, 0;
    %pushi/vec4 0, 0, 32;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1f60, 4, 0;
    %pushi/vec4 4294901760, 0, 32;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b16a0, 4, 0;
    %pushi/vec4 46341, 0, 32;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1f60, 4, 0;
    %pushi/vec4 46341, 0, 32;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b16a0, 4, 0;
    %pushi/vec4 4294920955, 0, 32;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1f60, 4, 0;
    %pushi/vec4 4294920955, 0, 32;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b16a0, 4, 0;
    %pushi/vec4 4294934528, 0, 32;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b02a0, 4, 0;
    %pushi/vec4 56756, 0, 32;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b0520, 4, 0;
    %pushi/vec4 4294934528, 0, 32;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b02a0, 4, 0;
    %pushi/vec4 4294910540, 0, 32;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b0520, 4, 0;
    %pushi/vec4 50159, 0, 32;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b02a0, 4, 0;
    %pushi/vec4 42125, 0, 32;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b0520, 4, 0;
    %pushi/vec4 4294917137, 0, 32;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b02a0, 4, 0;
    %pushi/vec4 42125, 0, 32;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b0520, 4, 0;
    %pushi/vec4 4294917137, 0, 32;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b02a0, 4, 0;
    %pushi/vec4 4294925171, 0, 32;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b0520, 4, 0;
    %pushi/vec4 40827, 0, 32;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1a60, 4, 0;
    %pushi/vec4 51243, 0, 32;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1b00, 4, 0;
    %pushi/vec4 4294960014, 0, 32;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1a60, 4, 0;
    %pushi/vec4 63866, 0, 32;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1b00, 4, 0;
    %pushi/vec4 4294931251, 0, 32;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1a60, 4, 0;
    %pushi/vec4 28462, 0, 32;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1b00, 4, 0;
    %pushi/vec4 4294931251, 0, 32;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1a60, 4, 0;
    %pushi/vec4 4294938834, 0, 32;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1b00, 4, 0;
    %pushi/vec4 4294960014, 0, 32;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1a60, 4, 0;
    %pushi/vec4 4294903430, 0, 32;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0000023deb5b1b00, 4, 0;
    %end;
    .thread T_12;
    .scope S_0000023deb553610;
T_13 ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0000023deb5b0340_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0000023deb5b0840_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0000023deb5b0160_0, 0, 1;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0000023deb5b1060_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v0000023deb5b1ec0_0, 0, 2;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0000023deb5b1740_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0000023deb5b03e0_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0000023deb5b14c0_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0000023deb5b0660_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0000023deb5b1560_0, 0, 32;
    %delay 20000, 0;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0000023deb5b0840_0, 0, 1;
    %delay 20000, 0;
    %vpi_call 2 207 "$display", "==========================================" {0 0 0};
    %vpi_call 2 208 "$display", "Starting Circle FSM Testbench (Fixed)" {0 0 0};
    %vpi_call 2 209 "$display", "==========================================" {0 0 0};
    %vpi_call 2 212 "$display", "\012Testing Base 2:" {0 0 0};
    %vpi_call 2 213 "$display", "----------------" {0 0 0};
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0000023deb5b1740_0, 0, 32;
T_13.0 ;
    %load/vec4 v0000023deb5b1740_0;
    %cmpi/s 5, 0, 32;
    %jmp/0xz T_13.1, 5;
    %ix/getv/s 4, v0000023deb5b1740_0;
    %load/vec4a v0000023deb5b05c0, 4;
    %store/vec4 v0000023deb5b1920_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v0000023deb5b2000_0, 0, 2;
    %ix/getv/s 4, v0000023deb5b1740_0;
    %load/vec4a v0000023deb5b1f60, 4;
    %store/vec4 v0000023deb5b1e20_0, 0, 32;
    %ix/getv/s 4, v0000023deb5b1740_0;
    %load/vec4a v0000023deb5b16a0, 4;
    %store/vec4 v0000023deb5b1ba0_0, 0, 32;
    %fork TD_circle_fsm_32bit_simple_fixed_tb.run_test, S_0000023deb4ec990;
    %join;
    %load/vec4 v0000023deb5b1740_0;
    %addi 1, 0, 32;
    %store/vec4 v0000023deb5b1740_0, 0, 32;
    %jmp T_13.0;
T_13.1 ;
    %vpi_call 2 220 "$display", "\012Testing Base 3:" {0 0 0};
    %vpi_call 2 221 "$display", "----------------" {0 0 0};
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0000023deb5b1740_0, 0, 32;
T_13.2 ;
    %load/vec4 v0000023deb5b1740_0;
    %cmpi/s 5, 0, 32;
    %jmp/0xz T_13.3, 5;
    %ix/getv/s 4, v0000023deb5b1740_0;
    %load/vec4a v0000023deb5b05c0, 4;
    %store/vec4 v0000023deb5b1920_0, 0, 32;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v0000023deb5b2000_0, 0, 2;
    %ix/getv/s 4, v0000023deb5b1740_0;
    %load/vec4a v0000023deb5b02a0, 4;
    %store/vec4 v0000023deb5b1e20_0, 0, 32;
    %ix/getv/s 4, v0000023deb5b1740_0;
    %load/vec4a v0000023deb5b0520, 4;
    %store/vec4 v0000023deb5b1ba0_0, 0, 32;
    %fork TD_circle_fsm_32bit_simple_fixed_tb.run_test, S_0000023deb4ec990;
    %join;
    %load/vec4 v0000023deb5b1740_0;
    %addi 1, 0, 32;
    %store/vec4 v0000023deb5b1740_0, 0, 32;
    %jmp T_13.2;
T_13.3 ;
    %vpi_call 2 228 "$display", "\012Testing Base 7:" {0 0 0};
    %vpi_call 2 229 "$display", "----------------" {0 0 0};
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0000023deb5b1740_0, 0, 32;
T_13.4 ;
    %load/vec4 v0000023deb5b1740_0;
    %cmpi/s 5, 0, 32;
    %jmp/0xz T_13.5, 5;
    %ix/getv/s 4, v0000023deb5b1740_0;
    %load/vec4a v0000023deb5b05c0, 4;
    %store/vec4 v0000023deb5b1920_0, 0, 32;
    %pushi/vec4 2, 0, 2;
    %store/vec4 v0000023deb5b2000_0, 0, 2;
    %ix/getv/s 4, v0000023deb5b1740_0;
    %load/vec4a v0000023deb5b1a60, 4;
    %store/vec4 v0000023deb5b1e20_0, 0, 32;
    %ix/getv/s 4, v0000023deb5b1740_0;
    %load/vec4a v0000023deb5b1b00, 4;
    %store/vec4 v0000023deb5b1ba0_0, 0, 32;
    %fork TD_circle_fsm_32bit_simple_fixed_tb.run_test, S_0000023deb4ec990;
    %join;
    %load/vec4 v0000023deb5b1740_0;
    %addi 1, 0, 32;
    %store/vec4 v0000023deb5b1740_0, 0, 32;
    %jmp T_13.4;
T_13.5 ;
    %vpi_call 2 236 "$display", "\012==========================================" {0 0 0};
    %vpi_call 2 237 "$display", "Test Summary:" {0 0 0};
    %vpi_call 2 238 "$display", "  Total tests: %0d", v0000023deb5b14c0_0 {0 0 0};
    %vpi_call 2 239 "$display", "  Passed: %0d", v0000023deb5b0660_0 {0 0 0};
    %vpi_call 2 240 "$display", "  Failed: %0d", v0000023deb5b1560_0 {0 0 0};
    %vpi_call 2 241 "$display", "  Error count: %0d", v0000023deb5b03e0_0 {0 0 0};
    %load/vec4 v0000023deb5b03e0_0;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_13.6, 4;
    %vpi_call 2 244 "$display", "\012All tests PASSED!" {0 0 0};
    %jmp T_13.7;
T_13.6 ;
    %vpi_call 2 246 "$display", "\012Some tests FAILED!" {0 0 0};
T_13.7 ;
    %vpi_call 2 249 "$display", "==========================================" {0 0 0};
    %delay 100000, 0;
    %vpi_call 2 253 "$finish" {0 0 0};
    %end;
    .thread T_13;
    .scope S_0000023deb553610;
T_14 ;
    %vpi_call 2 258 "$dumpfile", "circle_fsm_32bit_simple_fixed_tb.vcd" {0 0 0};
    %vpi_call 2 259 "$dumpvars", 32'sb00000000000000000000000000000000, S_0000023deb553610 {0 0 0};
    %end;
    .thread T_14;
# The file index is used to find the file name in the following table.
:file_names 8;
    "N/A";
    "<interactive>";
    "circle_fsm_32bit_simple_fixed_tb.v";
    "circle_fsm_32bit_simple_fixed.v";
    "cordic_trig_16bit_simple_fixed.v";
    "vdcorput_fsm_32bit_simple.v";
    "div_mod_3.v";
    "div_mod_7.v";
