#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\system.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\vhdl_sys.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\vhdl_textio.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\v2005_math.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\va_math.vpi";
S_000001ab0eb7be40 .scope module, "sphere3_fsm_32bit_simple_tb" "sphere3_fsm_32bit_simple_tb" 2 7;
 .timescale -9 -12;
P_000001ab0eb784b0 .param/l "CLK_PERIOD" 0 2 9, +C4<00000000000000000000000000001010>;
v000001ab0ebefda0_0 .var "base_sel0", 1 0;
v000001ab0ebefe40_0 .var "base_sel1", 1 0;
v000001ab0ebeff80_0 .var "base_sel2", 1 0;
v000001ab0ebef080_0 .var "clk", 0 0;
v000001ab0ebef1c0_0 .net "done", 0 0, v000001ab0ebeca60_0;  1 drivers
v000001ab0ebef260_0 .var "k_in", 31 0;
v000001ab0ebef300_0 .net "ready", 0 0, v000001ab0ebec7e0_0;  1 drivers
v000001ab0ebf3080_0 .net "result_w", 31 0, v000001ab0ebec9c0_0;  1 drivers
v000001ab0ebf4e80_0 .net "result_x", 31 0, v000001ab0ebef940_0;  1 drivers
v000001ab0ebf45c0_0 .net "result_y", 31 0, v000001ab0ebf0160_0;  1 drivers
v000001ab0ebf4340_0 .net "result_z", 31 0, v000001ab0ebef3a0_0;  1 drivers
v000001ab0ebf3e40_0 .var "rst_n", 0 0;
v000001ab0ebf4480_0 .var "start", 0 0;
S_000001ab0ea7e4b0 .scope module, "dut" "sphere3_fsm_32bit_simple" 2 25, 3 41 0, S_000001ab0eb7be40;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "k_in";
    .port_info 4 /INPUT 2 "base_sel0";
    .port_info 5 /INPUT 2 "base_sel1";
    .port_info 6 /INPUT 2 "base_sel2";
    .port_info 7 /OUTPUT 32 "result_x";
    .port_info 8 /OUTPUT 32 "result_y";
    .port_info 9 /OUTPUT 32 "result_z";
    .port_info 10 /OUTPUT 32 "result_w";
    .port_info 11 /OUTPUT 1 "done";
    .port_info 12 /OUTPUT 1 "ready";
P_000001ab0eaa9030 .param/l "CALC_OUTPUT" 0 3 65, C4<0111>;
P_000001ab0eaa9068 .param/l "CALC_TRIG" 0 3 63, C4<0101>;
P_000001ab0eaa90a0 .param/l "FINISH" 0 3 66, C4<1000>;
P_000001ab0eaa90d8 .param/l "FP_HALF" 0 3 82, C4<00000000000000001000000000000000>;
P_000001ab0eaa9110 .param/l "FP_HALF_PI" 0 3 84, C4<00000000000000011001001000011111>;
P_000001ab0eaa9148 .param/l "FP_ONE" 0 3 81, C4<00000000000000010000000000000000>;
P_000001ab0eaa9180 .param/l "FP_PI" 0 3 83, C4<00000000000000110010010000111111>;
P_000001ab0eaa91b8 .param/l "FP_TWO" 0 3 85, C4<00000000000000100000000000000000>;
P_000001ab0eaa91f0 .param/l "IDLE" 0 3 58, C4<0000>;
P_000001ab0eaa9228 .param/l "START_SPHERE" 0 3 61, C4<0011>;
P_000001ab0eaa9260 .param/l "START_VDC" 0 3 59, C4<0001>;
P_000001ab0eaa9298 .param/l "WAIT_SPHERE" 0 3 62, C4<0100>;
P_000001ab0eaa92d0 .param/l "WAIT_TRIG" 0 3 64, C4<0110>;
P_000001ab0eaa9308 .param/l "WAIT_VDC" 0 3 60, C4<0010>;
v000001ab0ebedb40_0 .net "base_sel0", 1 0, v000001ab0ebefda0_0;  1 drivers
v000001ab0ebedbe0_0 .net "base_sel1", 1 0, v000001ab0ebefe40_0;  1 drivers
v000001ab0ebee860_0 .net "base_sel2", 1 0, v000001ab0ebeff80_0;  1 drivers
v000001ab0ebedfa0_0 .net "clk", 0 0, v000001ab0ebef080_0;  1 drivers
v000001ab0ebee540_0 .var "cosxi_reg", 31 0;
v000001ab0ebee5e0_0 .var "current_state", 3 0;
v000001ab0ebeca60_0 .var "done", 0 0;
v000001ab0ebee7c0_0 .net "k_in", 31 0, v000001ab0ebef260_0;  1 drivers
v000001ab0ebeeb80_0 .var "k_reg", 31 0;
v000001ab0ebeec20_0 .var "next_state", 3 0;
v000001ab0ebec7e0_0 .var "ready", 0 0;
v000001ab0ebec9c0_0 .var "result_w", 31 0;
v000001ab0ebef940_0 .var "result_x", 31 0;
v000001ab0ebf0160_0 .var "result_y", 31 0;
v000001ab0ebef3a0_0 .var "result_z", 31 0;
v000001ab0ebef9e0_0 .net "rst_n", 0 0, v000001ab0ebf3e40_0;  1 drivers
v000001ab0ebf0340_0 .var "sinxi_reg", 31 0;
v000001ab0ebf03e0_0 .net "sphere_done", 0 0, v000001ab0ebe6aa0_0;  1 drivers
v000001ab0ebf0480_0 .net "sphere_ready", 0 0, v000001ab0ebe52e0_0;  1 drivers
v000001ab0ebef440_0 .var "sphere_start", 0 0;
v000001ab0ebf0020_0 .net "sphere_x", 31 0, v000001ab0ebe6d20_0;  1 drivers
v000001ab0ebef580_0 .net "sphere_y", 31 0, v000001ab0ebe54c0_0;  1 drivers
v000001ab0ebef4e0_0 .net "sphere_z", 31 0, v000001ab0ebe6000_0;  1 drivers
v000001ab0ebeefe0_0 .net "start", 0 0, v000001ab0ebf4480_0;  1 drivers
v000001ab0ebef620_0 .var "sx_reg", 31 0;
v000001ab0ebef6c0_0 .var "sy_reg", 31 0;
v000001ab0ebefee0_0 .var "sz_reg", 31 0;
v000001ab0ebf00c0_0 .var "ti_reg", 31 0;
v000001ab0ebef760_0 .var "trig_angle", 31 0;
v000001ab0ebf0200_0 .net "trig_cos", 31 0, v000001ab0ebe6780_0;  1 drivers
v000001ab0ebefa80_0 .net "trig_done", 0 0, v000001ab0ebe6140_0;  1 drivers
v000001ab0ebf0520_0 .net "trig_sin", 31 0, v000001ab0ebe6320_0;  1 drivers
v000001ab0ebef8a0_0 .var "trig_start", 0 0;
v000001ab0ebefb20_0 .net "vdc_done", 0 0, v000001ab0ebee900_0;  1 drivers
v000001ab0ebf05c0_0 .net "vdc_ready", 0 0, v000001ab0ebeda00_0;  1 drivers
v000001ab0ebf02a0_0 .net "vdc_result", 31 0, v000001ab0ebee4a0_0;  1 drivers
v000001ab0ebefbc0_0 .var "vdc_start", 0 0;
v000001ab0ebefc60_0 .var "xi_reg", 31 0;
E_000001ab0eb78bb0/0 .event anyedge, v000001ab0ebee5e0_0, v000001ab0ebeefe0_0, v000001ab0ebee900_0, v000001ab0ebe6aa0_0;
E_000001ab0eb78bb0/1 .event anyedge, v000001ab0ebe6140_0;
E_000001ab0eb78bb0 .event/or E_000001ab0eb78bb0/0, E_000001ab0eb78bb0/1;
L_000001ab0ec522e0 .part v000001ab0ebef760_0, 16, 16;
S_000001ab0ea7e640 .scope function.vec4.s32, "interpolate_xi" "interpolate_xi" 3 149, 3 149 0, S_000001ab0ea7e4b0;
 .timescale -9 -12;
; Variable interpolate_xi is vec4 return value of scope S_000001ab0ea7e640
v000001ab0eb6c960_0 .var "temp", 63 0;
v000001ab0eb6dae0_0 .var "ti", 31 0;
TD_sphere3_fsm_32bit_simple_tb.dut.interpolate_xi ;
    %load/vec4 v000001ab0eb6dae0_0;
    %pad/u 64;
    %muli 131072, 0, 64;
    %store/vec4 v000001ab0eb6c960_0, 0, 64;
    %load/vec4 v000001ab0eb6c960_0;
    %parti/s 32, 16, 6;
    %ret/vec4 0, 0, 32;  Assign to interpolate_xi (store_vec4_to_lval)
    %end;
S_000001ab0ea07510 .scope module, "sphere_inst" "sphere_fsm_32bit_simple" 3 121, 4 37 0, S_000001ab0ea7e4b0;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "k_in";
    .port_info 4 /INPUT 2 "base_sel0";
    .port_info 5 /INPUT 2 "base_sel1";
    .port_info 6 /OUTPUT 32 "result_x";
    .port_info 7 /OUTPUT 32 "result_y";
    .port_info 8 /OUTPUT 32 "result_z";
    .port_info 9 /OUTPUT 1 "done";
    .port_info 10 /OUTPUT 1 "ready";
P_000001ab0ea076a0 .param/l "CALC_OUTPUT" 0 4 58, C4<0110>;
P_000001ab0ea076d8 .param/l "CALC_SINPHI" 0 4 57, C4<0101>;
P_000001ab0ea07710 .param/l "FINISH" 0 4 59, C4<0111>;
P_000001ab0ea07748 .param/l "FP_NEG_ONE" 0 4 77, C4<11111111111111110000000000000000>;
P_000001ab0ea07780 .param/l "FP_ONE" 0 4 75, C4<00000000000000010000000000000000>;
P_000001ab0ea077b8 .param/l "FP_TWO" 0 4 76, C4<00000000000000100000000000000000>;
P_000001ab0ea077f0 .param/l "IDLE" 0 4 52, C4<0000>;
P_000001ab0ea07828 .param/l "START_CIRCLE" 0 4 55, C4<0011>;
P_000001ab0ea07860 .param/l "START_VDC" 0 4 53, C4<0001>;
P_000001ab0ea07898 .param/l "WAIT_CIRCLE" 0 4 56, C4<0100>;
P_000001ab0ea078d0 .param/l "WAIT_VDC" 0 4 54, C4<0010>;
v000001ab0ebe42d0_0 .net "base_sel0", 1 0, v000001ab0ebefe40_0;  alias, 1 drivers
v000001ab0ebe4370_0 .net "base_sel1", 1 0, v000001ab0ebeff80_0;  alias, 1 drivers
v000001ab0ebe4910_0 .net "circle_done", 0 0, v000001ab0ebdffc0_0;  1 drivers
v000001ab0ebe4550_0 .net "circle_ready", 0 0, v000001ab0ebde940_0;  1 drivers
v000001ab0ebe7540_0 .net "circle_result_x", 31 0, v000001ab0ebdfca0_0;  1 drivers
v000001ab0ebe4f20_0 .net "circle_result_y", 31 0, v000001ab0ebdf980_0;  1 drivers
v000001ab0ebe5c40_0 .var "circle_start", 0 0;
v000001ab0ebe66e0_0 .var "circle_x_reg", 31 0;
v000001ab0ebe4e80_0 .var "circle_y_reg", 31 0;
v000001ab0ebe6280_0 .net "clk", 0 0, v000001ab0ebef080_0;  alias, 1 drivers
v000001ab0ebe5880_0 .var "cosphi_reg", 31 0;
v000001ab0ebe6960_0 .var "cosphi_sq", 63 0;
v000001ab0ebe75e0_0 .var "current_state", 3 0;
v000001ab0ebe6aa0_0 .var "done", 0 0;
v000001ab0ebe6820_0 .net "k_in", 31 0, v000001ab0ebeeb80_0;  1 drivers
v000001ab0ebe5240_0 .var "k_reg", 31 0;
v000001ab0ebe6b40_0 .var "next_state", 3 0;
v000001ab0ebe6640_0 .var "one_minus_cosphi_sq", 31 0;
v000001ab0ebe52e0_0 .var "ready", 0 0;
v000001ab0ebe6d20_0 .var "result_x", 31 0;
v000001ab0ebe54c0_0 .var "result_y", 31 0;
v000001ab0ebe6000_0 .var "result_z", 31 0;
v000001ab0ebe57e0_0 .net "rst_n", 0 0, v000001ab0ebf3e40_0;  alias, 1 drivers
v000001ab0ebe70e0_0 .var "sinphi_reg", 31 0;
v000001ab0ebe7400_0 .net "start", 0 0, v000001ab0ebef440_0;  1 drivers
v000001ab0ebe5060_0 .net "vdc_done", 0 0, v000001ab0ebe3510_0;  1 drivers
v000001ab0ebe74a0_0 .net "vdc_ready", 0 0, v000001ab0ebe4230_0;  1 drivers
v000001ab0ebe5920_0 .net "vdc_result", 31 0, v000001ab0ebe44b0_0;  1 drivers
v000001ab0ebe5600_0 .var "vdc_start", 0 0;
E_000001ab0eb78af0 .event anyedge, v000001ab0ebe75e0_0, v000001ab0ebe7400_0, v000001ab0ebe3510_0, v000001ab0ebdffc0_0;
S_000001ab0ea46d90 .scope module, "circle_inst" "circle_fsm_32bit_simple_fixed" 4 101, 5 36 0, S_000001ab0ea07510;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "k_in";
    .port_info 4 /INPUT 2 "base_sel";
    .port_info 5 /OUTPUT 32 "result_x";
    .port_info 6 /OUTPUT 32 "result_y";
    .port_info 7 /OUTPUT 1 "done";
    .port_info 8 /OUTPUT 1 "ready";
P_000001ab0ea46f20 .param/l "FINISH" 0 5 54, C4<101>;
P_000001ab0ea46f58 .param/l "FP_ONE" 0 5 73, C4<00000000000000010000000000000000>;
P_000001ab0ea46f90 .param/l "FP_ONE_DIV_2PI" 0 5 74, C4<00000000000000000010100010111110>;
P_000001ab0ea46fc8 .param/l "FP_TWO_PI" 0 5 72, C4<00000000000001100100100001111111>;
P_000001ab0ea47000 .param/l "IDLE" 0 5 49, C4<000>;
P_000001ab0ea47038 .param/l "START_CORDIC" 0 5 52, C4<011>;
P_000001ab0ea47070 .param/l "START_VDC" 0 5 50, C4<001>;
P_000001ab0ea470a8 .param/l "WAIT_CORDIC" 0 5 53, C4<100>;
P_000001ab0ea470e0 .param/l "WAIT_VDC" 0 5 51, C4<010>;
v000001ab0ebdf700_0 .var "angle_reg", 31 0;
v000001ab0ebde3a0_0 .net "base_sel", 1 0, v000001ab0ebeff80_0;  alias, 1 drivers
v000001ab0ebde580_0 .net "clk", 0 0, v000001ab0ebef080_0;  alias, 1 drivers
v000001ab0ebdfd40_0 .var "cordic_angle", 15 0;
v000001ab0ebde620_0 .net "cordic_cos", 31 0, v000001ab0eb6c8c0_0;  1 drivers
v000001ab0ebde6c0_0 .net "cordic_done", 0 0, v000001ab0eb6d860_0;  1 drivers
v000001ab0ebdf160_0 .net "cordic_sin", 31 0, v000001ab0eb6d360_0;  1 drivers
v000001ab0ebdec60_0 .var "cordic_start", 0 0;
v000001ab0ebdf840_0 .var "current_state", 2 0;
v000001ab0ebdffc0_0 .var "done", 0 0;
v000001ab0ebdf8e0_0 .net "k_in", 31 0, v000001ab0ebe5240_0;  1 drivers
v000001ab0ebdf0c0_0 .var "k_reg", 31 0;
v000001ab0ebdfe80_0 .var "next_state", 2 0;
v000001ab0ebde940_0 .var "ready", 0 0;
v000001ab0ebdfca0_0 .var "result_x", 31 0;
v000001ab0ebdf980_0 .var "result_y", 31 0;
v000001ab0ebdf200_0 .net "rst_n", 0 0, v000001ab0ebf3e40_0;  alias, 1 drivers
v000001ab0ebde9e0_0 .net "start", 0 0, v000001ab0ebe5c40_0;  1 drivers
v000001ab0ebdea80_0 .net "vdc_done", 0 0, v000001ab0ebddab0_0;  1 drivers
v000001ab0ebdf340_0 .net "vdc_ready", 0 0, v000001ab0ebdef80_0;  1 drivers
v000001ab0ebde760_0 .net "vdc_result", 31 0, v000001ab0ebdfac0_0;  1 drivers
v000001ab0ebdf5c0_0 .var "vdc_start", 0 0;
E_000001ab0eb78670 .event anyedge, v000001ab0ebdf840_0, v000001ab0ebde9e0_0, v000001ab0ebddab0_0, v000001ab0eb6d860_0;
S_000001ab0eab7be0 .scope module, "cordic_inst" "cordic_trig_16bit_simple_fixed" 5 89, 6 22 0, S_000001ab0ea46d90;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 16 "angle";
    .port_info 4 /OUTPUT 32 "cosine";
    .port_info 5 /OUTPUT 32 "sine";
    .port_info 6 /OUTPUT 1 "done";
    .port_info 7 /OUTPUT 1 "ready";
P_000001ab0ea47120 .param/l "COMPUTE" 0 6 35, C4<01>;
P_000001ab0ea47158 .param/l "FINISH" 0 6 36, C4<10>;
P_000001ab0ea47190 .param/l "IDLE" 0 6 34, C4<00>;
P_000001ab0ea471c8 .param/l "K" 0 6 58, C4<01001101101110101>;
v000001ab0eb6c780_0 .net "angle", 15 0, v000001ab0ebdfd40_0;  1 drivers
v000001ab0eb6d2c0_0 .var "angle_reg", 15 0;
v000001ab0eb6c1e0 .array "atan_table", 15 0, 15 0;
v000001ab0eb6be20_0 .net "clk", 0 0, v000001ab0ebef080_0;  alias, 1 drivers
v000001ab0eb6da40_0 .var "cos_result", 31 0;
v000001ab0eb6c8c0_0 .var "cosine", 31 0;
v000001ab0eb6d860_0 .var "done", 0 0;
v000001ab0eb6db80_0 .var "iteration", 3 0;
v000001ab0eb6ca00_0 .var "next_state", 1 0;
v000001ab0eb6cc80_0 .var "ready", 0 0;
v000001ab0eb6d5e0_0 .var "reduced_angle", 15 0;
v000001ab0eb6dc20_0 .net "rst_n", 0 0, v000001ab0ebf3e40_0;  alias, 1 drivers
v000001ab0eb6d680_0 .var "sin_result", 31 0;
v000001ab0eb6d360_0 .var "sine", 31 0;
v000001ab0eb6c280_0 .net "start", 0 0, v000001ab0ebdec60_0;  1 drivers
v000001ab0eb6d400_0 .var "state", 1 0;
v000001ab0eb6cfa0_0 .var "x", 16 0;
v000001ab0eb6d720_0 .var "x_scaled", 31 0;
v000001ab0eb6d7c0_0 .var "y", 16 0;
v000001ab0eb6d4a0_0 .var "y_scaled", 31 0;
v000001ab0eb6d900_0 .var "z", 15 0;
E_000001ab0eb78970/0 .event negedge, v000001ab0eb6dc20_0;
E_000001ab0eb78970/1 .event posedge, v000001ab0eb6be20_0;
E_000001ab0eb78970 .event/or E_000001ab0eb78970/0, E_000001ab0eb78970/1;
E_000001ab0eb789b0 .event anyedge, v000001ab0eb6d400_0, v000001ab0eb6c280_0, v000001ab0eb6db80_0;
S_000001ab0eab7d70 .scope module, "vdc_inst" "vdcorput_fsm_32bit_simple" 5 77, 7 9 0, S_000001ab0ea46d90;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "k_in";
    .port_info 4 /INPUT 2 "base_sel";
    .port_info 5 /OUTPUT 32 "result";
    .port_info 6 /OUTPUT 1 "done";
    .port_info 7 /OUTPUT 1 "ready";
P_000001ab0eaab8d0 .param/l "ACCUMULATE" 0 7 24, C4<011>;
P_000001ab0eaab908 .param/l "CHECK" 0 7 26, C4<101>;
P_000001ab0eaab940 .param/l "DIVIDE" 0 7 23, C4<010>;
P_000001ab0eaab978 .param/l "FINISH" 0 7 27, C4<110>;
P_000001ab0eaab9b0 .param/l "FP_HALF" 0 7 41, C4<00000000000000001000000000000000>;
P_000001ab0eaab9e8 .param/l "FP_ONE" 0 7 40, C4<00000000000000010000000000000000>;
P_000001ab0eaaba20 .param/l "FP_SEVENTH" 0 7 43, C4<00000000000000000010010010010010>;
P_000001ab0eaaba58 .param/l "FP_THIRD" 0 7 42, C4<00000000000000000101010101010101>;
P_000001ab0eaaba90 .param/l "IDLE" 0 7 21, C4<000>;
P_000001ab0eaabac8 .param/l "INIT" 0 7 22, C4<001>;
P_000001ab0eaabb00 .param/l "UPDATE" 0 7 25, C4<100>;
v000001ab0ebddfb0_0 .var "acc_reg", 31 0;
v000001ab0ebdda10_0 .var "base_reg", 31 0;
v000001ab0ebdc570_0 .net "base_sel", 1 0, v000001ab0ebeff80_0;  alias, 1 drivers
v000001ab0ebdd510_0 .net "clk", 0 0, v000001ab0ebef080_0;  alias, 1 drivers
v000001ab0ebdd790_0 .var "current_state", 2 0;
v000001ab0ebdd830_0 .net "div3_quotient", 7 0, L_000001ab0ec51200;  1 drivers
v000001ab0ebdc4d0_0 .net "div3_remainder", 1 0, L_000001ab0ec51480;  1 drivers
v000001ab0ebdc610_0 .net "div7_quotient", 8 0, L_000001ab0ec52100;  1 drivers
v000001ab0ebdd8d0_0 .net "div7_remainder", 2 0, L_000001ab0ec51ca0;  1 drivers
v000001ab0ebddab0_0 .var "done", 0 0;
v000001ab0ebdfc00_0 .net "k_in", 31 0, v000001ab0ebdf0c0_0;  1 drivers
v000001ab0ebe0060_0 .var "k_reg", 31 0;
v000001ab0ebdf520_0 .var "next_state", 2 0;
v000001ab0ebdeda0_0 .var "power_reg", 31 0;
v000001ab0ebde800_0 .var "quotient_reg", 31 0;
v000001ab0ebdef80_0 .var "ready", 0 0;
v000001ab0ebde8a0_0 .var "remainder_reg", 31 0;
v000001ab0ebdfac0_0 .var "result", 31 0;
v000001ab0ebdf020_0 .net "rst_n", 0 0, v000001ab0ebf3e40_0;  alias, 1 drivers
v000001ab0ebdebc0_0 .net "start", 0 0, v000001ab0ebdf5c0_0;  1 drivers
E_000001ab0eb78270 .event anyedge, v000001ab0ebdd790_0, v000001ab0ebdebc0_0, v000001ab0ebe0060_0;
L_000001ab0ec51520 .part v000001ab0ebe0060_0, 0, 8;
L_000001ab0ec52420 .part v000001ab0ebe0060_0, 0, 9;
S_000001ab0eaabb40 .scope module, "div3_inst" "div_mod_3" 7 52, 8 28 0, S_000001ab0eab7d70;
 .timescale -9 -12;
    .port_info 0 /INPUT 8 "n";
    .port_info 1 /OUTPUT 8 "quotient";
    .port_info 2 /OUTPUT 2 "remainder";
L_000001ab0ebf7be0 .functor BUFT 1, C4<00000>, C4<0>, C4<0>, C4<0>;
v000001ab0eb6bd80_0 .net *"_ivl_11", 4 0, L_000001ab0ebf7be0;  1 drivers
v000001ab0eb6caa0_0 .net *"_ivl_18", 5 0, L_000001ab0ec4efa0;  1 drivers
L_000001ab0ebf7c28 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0eb6d540_0 .net *"_ivl_21", 0 0, L_000001ab0ebf7c28;  1 drivers
v000001ab0eb6c3c0_0 .net *"_ivl_22", 5 0, L_000001ab0ec50800;  1 drivers
L_000001ab0ebf7c70 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0eb6c6e0_0 .net *"_ivl_25", 3 0, L_000001ab0ebf7c70;  1 drivers
v000001ab0eb6cbe0_0 .net *"_ivl_32", 4 0, L_000001ab0ec508a0;  1 drivers
L_000001ab0ebf7cb8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0eb6c820_0 .net *"_ivl_35", 0 0, L_000001ab0ebf7cb8;  1 drivers
v000001ab0eb6d9a0_0 .net *"_ivl_36", 4 0, L_000001ab0ec503a0;  1 drivers
L_000001ab0ebf7d00 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001ab0eb6c320_0 .net *"_ivl_39", 2 0, L_000001ab0ebf7d00;  1 drivers
v000001ab0eb6bec0_0 .net *"_ivl_4", 6 0, L_000001ab0ec4fb80;  1 drivers
v000001ab0eb6c460_0 .net *"_ivl_43", 2 0, L_000001ab0ec4f400;  1 drivers
v000001ab0eb6bf60_0 .net *"_ivl_50", 7 0, L_000001ab0ec4f4a0;  1 drivers
L_000001ab0ebf7d48 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0eb6cd20_0 .net *"_ivl_53", 1 0, L_000001ab0ebf7d48;  1 drivers
v000001ab0eb6cdc0_0 .net *"_ivl_54", 7 0, L_000001ab0ec504e0;  1 drivers
L_000001ab0ebf7d90 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001ab0eb6c000_0 .net *"_ivl_57", 2 0, L_000001ab0ebf7d90;  1 drivers
v000001ab0eb6c500_0 .net *"_ivl_58", 7 0, L_000001ab0ec4f680;  1 drivers
v000001ab0eb6ce60_0 .net *"_ivl_60", 7 0, L_000001ab0ec506c0;  1 drivers
L_000001ab0ebf7dd8 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0eb6cf00_0 .net *"_ivl_63", 3 0, L_000001ab0ebf7dd8;  1 drivers
v000001ab0eb6c5a0_0 .net *"_ivl_64", 7 0, L_000001ab0ec50a80;  1 drivers
v000001ab0eb6d040_0 .net *"_ivl_66", 7 0, L_000001ab0ec50bc0;  1 drivers
L_000001ab0ebf7e20 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v000001ab0eb6c640_0 .net *"_ivl_69", 5 0, L_000001ab0ebf7e20;  1 drivers
L_000001ab0ebf7b98 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0eb41430_0 .net *"_ivl_7", 0 0, L_000001ab0ebf7b98;  1 drivers
L_000001ab0ebf7e68 .functor BUFT 1, C4<11>, C4<0>, C4<0>, C4<0>;
v000001ab0eb3f950_0 .net/2u *"_ivl_72", 1 0, L_000001ab0ebf7e68;  1 drivers
v000001ab0eb3fdb0_0 .net *"_ivl_74", 0 0, L_000001ab0ec4ef00;  1 drivers
L_000001ab0ebf7eb0 .functor BUFT 1, C4<00000001>, C4<0>, C4<0>, C4<0>;
v000001ab0eb40350_0 .net/2u *"_ivl_76", 7 0, L_000001ab0ebf7eb0;  1 drivers
v000001ab0eb40670_0 .net *"_ivl_78", 7 0, L_000001ab0ec51160;  1 drivers
v000001ab0eb40530_0 .net *"_ivl_8", 6 0, L_000001ab0ec50940;  1 drivers
L_000001ab0ebf7ef8 .functor BUFT 1, C4<11>, C4<0>, C4<0>, C4<0>;
v000001ab0eb3fe50_0 .net/2u *"_ivl_82", 1 0, L_000001ab0ebf7ef8;  1 drivers
v000001ab0eb3ff90_0 .net *"_ivl_84", 0 0, L_000001ab0ec512a0;  1 drivers
L_000001ab0ebf7f40 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0eb405d0_0 .net/2u *"_ivl_86", 1 0, L_000001ab0ebf7f40;  1 drivers
v000001ab0eb407b0_0 .net "n", 7 0, L_000001ab0ec51520;  1 drivers
v000001ab0eb41570_0 .net "q1", 5 0, L_000001ab0ec4f9a0;  1 drivers
v000001ab0eb40990_0 .net "q2", 4 0, L_000001ab0ec50c60;  1 drivers
v000001ab0eb416b0_0 .net "q3", 3 0, L_000001ab0ec4f540;  1 drivers
v000001ab0eb40a30_0 .net "q4", 1 0, L_000001ab0ec50440;  1 drivers
v000001ab0eb40cb0_0 .net "quotient", 7 0, L_000001ab0ec51200;  alias, 1 drivers
v000001ab0eb3f810_0 .net "quotient_sum", 7 0, L_000001ab0ec50da0;  1 drivers
v000001ab0eb40e90_0 .net "r1", 1 0, L_000001ab0ec4fa40;  1 drivers
v000001ab0eb40fd0_0 .net "r2", 1 0, L_000001ab0ec4fc20;  1 drivers
v000001ab0eb22830_0 .net "r3", 1 0, L_000001ab0ec510c0;  1 drivers
v000001ab0eb228d0_0 .net "r4", 1 0, L_000001ab0ec50d00;  1 drivers
v000001ab0eb22a10_0 .net "rem1", 6 0, L_000001ab0ec50300;  1 drivers
v000001ab0eb22e70_0 .net "rem2", 5 0, L_000001ab0ec50620;  1 drivers
v000001ab0eb08040_0 .net "rem3", 4 0, L_000001ab0ec4f360;  1 drivers
v000001ab0eb082c0_0 .net "rem4", 1 0, L_000001ab0ec50580;  1 drivers
v000001ab0eb08680_0 .net "remainder", 1 0, L_000001ab0ec51480;  alias, 1 drivers
L_000001ab0ec4f9a0 .part L_000001ab0ec51520, 2, 6;
L_000001ab0ec4fa40 .part L_000001ab0ec51520, 0, 2;
L_000001ab0ec4fb80 .concat [ 6 1 0 0], L_000001ab0ec4f9a0, L_000001ab0ebf7b98;
L_000001ab0ec50940 .concat [ 2 5 0 0], L_000001ab0ec4fa40, L_000001ab0ebf7be0;
L_000001ab0ec50300 .arith/sum 7, L_000001ab0ec4fb80, L_000001ab0ec50940;
L_000001ab0ec50c60 .part L_000001ab0ec50300, 2, 5;
L_000001ab0ec4fc20 .part L_000001ab0ec50300, 0, 2;
L_000001ab0ec4efa0 .concat [ 5 1 0 0], L_000001ab0ec50c60, L_000001ab0ebf7c28;
L_000001ab0ec50800 .concat [ 2 4 0 0], L_000001ab0ec4fc20, L_000001ab0ebf7c70;
L_000001ab0ec50620 .arith/sum 6, L_000001ab0ec4efa0, L_000001ab0ec50800;
L_000001ab0ec4f540 .part L_000001ab0ec50620, 2, 4;
L_000001ab0ec510c0 .part L_000001ab0ec50620, 0, 2;
L_000001ab0ec508a0 .concat [ 4 1 0 0], L_000001ab0ec4f540, L_000001ab0ebf7cb8;
L_000001ab0ec503a0 .concat [ 2 3 0 0], L_000001ab0ec510c0, L_000001ab0ebf7d00;
L_000001ab0ec4f360 .arith/sum 5, L_000001ab0ec508a0, L_000001ab0ec503a0;
L_000001ab0ec4f400 .part L_000001ab0ec4f360, 2, 3;
L_000001ab0ec50440 .part L_000001ab0ec4f400, 0, 2;
L_000001ab0ec50d00 .part L_000001ab0ec4f360, 0, 2;
L_000001ab0ec50580 .arith/sum 2, L_000001ab0ec50440, L_000001ab0ec50d00;
L_000001ab0ec4f4a0 .concat [ 6 2 0 0], L_000001ab0ec4f9a0, L_000001ab0ebf7d48;
L_000001ab0ec504e0 .concat [ 5 3 0 0], L_000001ab0ec50c60, L_000001ab0ebf7d90;
L_000001ab0ec4f680 .arith/sum 8, L_000001ab0ec4f4a0, L_000001ab0ec504e0;
L_000001ab0ec506c0 .concat [ 4 4 0 0], L_000001ab0ec4f540, L_000001ab0ebf7dd8;
L_000001ab0ec50a80 .arith/sum 8, L_000001ab0ec4f680, L_000001ab0ec506c0;
L_000001ab0ec50bc0 .concat [ 2 6 0 0], L_000001ab0ec50440, L_000001ab0ebf7e20;
L_000001ab0ec50da0 .arith/sum 8, L_000001ab0ec50a80, L_000001ab0ec50bc0;
L_000001ab0ec4ef00 .cmp/eq 2, L_000001ab0ec50580, L_000001ab0ebf7e68;
L_000001ab0ec51160 .arith/sum 8, L_000001ab0ec50da0, L_000001ab0ebf7eb0;
L_000001ab0ec51200 .functor MUXZ 8, L_000001ab0ec50da0, L_000001ab0ec51160, L_000001ab0ec4ef00, C4<>;
L_000001ab0ec512a0 .cmp/eq 2, L_000001ab0ec50580, L_000001ab0ebf7ef8;
L_000001ab0ec51480 .functor MUXZ 2, L_000001ab0ec50580, L_000001ab0ebf7f40, L_000001ab0ec512a0, C4<>;
S_000001ab0ea90470 .scope module, "div7_inst" "div_mod_7" 7 58, 9 14 0, S_000001ab0eab7d70;
 .timescale -9 -12;
    .port_info 0 /INPUT 9 "n";
    .port_info 1 /OUTPUT 9 "quotient";
    .port_info 2 /OUTPUT 3 "remainder";
L_000001ab0ebf7fd0 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0eb08cc0_0 .net *"_ivl_11", 3 0, L_000001ab0ebf7fd0;  1 drivers
v000001ab0ebdc930_0 .net *"_ivl_18", 4 0, L_000001ab0ec529c0;  1 drivers
L_000001ab0ebf8018 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdd0b0_0 .net *"_ivl_21", 0 0, L_000001ab0ebf8018;  1 drivers
v000001ab0ebdc2f0_0 .net *"_ivl_22", 4 0, L_000001ab0ec51660;  1 drivers
L_000001ab0ebf8060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdcf70_0 .net *"_ivl_25", 1 0, L_000001ab0ebf8060;  1 drivers
v000001ab0ebdd970_0 .net *"_ivl_32", 2 0, L_000001ab0ec51d40;  1 drivers
L_000001ab0ebf80a8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdd290_0 .net *"_ivl_35", 0 0, L_000001ab0ebf80a8;  1 drivers
v000001ab0ebdc9d0_0 .net *"_ivl_38", 7 0, L_000001ab0ec51ac0;  1 drivers
v000001ab0ebdc6b0_0 .net *"_ivl_4", 6 0, L_000001ab0ec51e80;  1 drivers
L_000001ab0ebf80f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdd150_0 .net *"_ivl_41", 1 0, L_000001ab0ebf80f0;  1 drivers
v000001ab0ebdddd0_0 .net *"_ivl_42", 7 0, L_000001ab0ec52a60;  1 drivers
L_000001ab0ebf8138 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdcc50_0 .net *"_ivl_45", 3 0, L_000001ab0ebf8138;  1 drivers
v000001ab0ebdd010_0 .net *"_ivl_46", 7 0, L_000001ab0ec517a0;  1 drivers
v000001ab0ebdd650_0 .net *"_ivl_48", 7 0, L_000001ab0ec51700;  1 drivers
L_000001ab0ebf8180 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebde050_0 .net *"_ivl_51", 5 0, L_000001ab0ebf8180;  1 drivers
L_000001ab0ebf81c8 .functor BUFT 1, C4<111>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdd1f0_0 .net/2u *"_ivl_54", 2 0, L_000001ab0ebf81c8;  1 drivers
v000001ab0ebddc90_0 .net *"_ivl_56", 0 0, L_000001ab0ec526a0;  1 drivers
v000001ab0ebddd30_0 .net *"_ivl_58", 8 0, L_000001ab0ec51fc0;  1 drivers
L_000001ab0ebf8210 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdca70_0 .net *"_ivl_61", 0 0, L_000001ab0ebf8210;  1 drivers
L_000001ab0ebf8258 .functor BUFT 1, C4<000000001>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdc750_0 .net/2u *"_ivl_62", 8 0, L_000001ab0ebf8258;  1 drivers
v000001ab0ebdc430_0 .net *"_ivl_64", 8 0, L_000001ab0ec52ce0;  1 drivers
v000001ab0ebdc7f0_0 .net *"_ivl_66", 8 0, L_000001ab0ec52240;  1 drivers
L_000001ab0ebf82a0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdced0_0 .net *"_ivl_69", 0 0, L_000001ab0ebf82a0;  1 drivers
L_000001ab0ebf7f88 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdde70_0 .net *"_ivl_7", 0 0, L_000001ab0ebf7f88;  1 drivers
L_000001ab0ebf82e8 .functor BUFT 1, C4<111>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdcd90_0 .net/2u *"_ivl_72", 2 0, L_000001ab0ebf82e8;  1 drivers
v000001ab0ebdc890_0 .net *"_ivl_74", 0 0, L_000001ab0ec521a0;  1 drivers
L_000001ab0ebf8330 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebddb50_0 .net/2u *"_ivl_76", 2 0, L_000001ab0ebf8330;  1 drivers
v000001ab0ebddbf0_0 .net *"_ivl_8", 6 0, L_000001ab0ec51840;  1 drivers
v000001ab0ebde0f0_0 .net "n", 8 0, L_000001ab0ec52420;  1 drivers
v000001ab0ebdcb10_0 .net "q1", 5 0, L_000001ab0ec4f040;  1 drivers
v000001ab0ebddf10_0 .net "q2", 3 0, L_000001ab0ec51f20;  1 drivers
v000001ab0ebdce30_0 .net "q3", 1 0, L_000001ab0ec52920;  1 drivers
v000001ab0ebdd330_0 .net "quotient", 8 0, L_000001ab0ec52100;  alias, 1 drivers
v000001ab0ebdd5b0_0 .net "quotient_sum", 7 0, L_000001ab0ec51de0;  1 drivers
v000001ab0ebdd6f0_0 .net "r1", 2 0, L_000001ab0ec515c0;  1 drivers
v000001ab0ebdd3d0_0 .net "r2", 2 0, L_000001ab0ec52560;  1 drivers
v000001ab0ebdcbb0_0 .net "r3", 2 0, L_000001ab0ec518e0;  1 drivers
v000001ab0ebdccf0_0 .net "rem1", 6 0, L_000001ab0ec52c40;  1 drivers
v000001ab0ebde190_0 .net "rem2", 4 0, L_000001ab0ec52600;  1 drivers
v000001ab0ebdc390_0 .net "rem3", 2 0, L_000001ab0ec52060;  1 drivers
v000001ab0ebdd470_0 .net "remainder", 2 0, L_000001ab0ec51ca0;  alias, 1 drivers
L_000001ab0ec4f040 .part L_000001ab0ec52420, 3, 6;
L_000001ab0ec515c0 .part L_000001ab0ec52420, 0, 3;
L_000001ab0ec51e80 .concat [ 6 1 0 0], L_000001ab0ec4f040, L_000001ab0ebf7f88;
L_000001ab0ec51840 .concat [ 3 4 0 0], L_000001ab0ec515c0, L_000001ab0ebf7fd0;
L_000001ab0ec52c40 .arith/sum 7, L_000001ab0ec51e80, L_000001ab0ec51840;
L_000001ab0ec51f20 .part L_000001ab0ec52c40, 3, 4;
L_000001ab0ec52560 .part L_000001ab0ec52c40, 0, 3;
L_000001ab0ec529c0 .concat [ 4 1 0 0], L_000001ab0ec51f20, L_000001ab0ebf8018;
L_000001ab0ec51660 .concat [ 3 2 0 0], L_000001ab0ec52560, L_000001ab0ebf8060;
L_000001ab0ec52600 .arith/sum 5, L_000001ab0ec529c0, L_000001ab0ec51660;
L_000001ab0ec52920 .part L_000001ab0ec52600, 3, 2;
L_000001ab0ec518e0 .part L_000001ab0ec52600, 0, 3;
L_000001ab0ec51d40 .concat [ 2 1 0 0], L_000001ab0ec52920, L_000001ab0ebf80a8;
L_000001ab0ec52060 .arith/sum 3, L_000001ab0ec51d40, L_000001ab0ec518e0;
L_000001ab0ec51ac0 .concat [ 6 2 0 0], L_000001ab0ec4f040, L_000001ab0ebf80f0;
L_000001ab0ec52a60 .concat [ 4 4 0 0], L_000001ab0ec51f20, L_000001ab0ebf8138;
L_000001ab0ec517a0 .arith/sum 8, L_000001ab0ec51ac0, L_000001ab0ec52a60;
L_000001ab0ec51700 .concat [ 2 6 0 0], L_000001ab0ec52920, L_000001ab0ebf8180;
L_000001ab0ec51de0 .arith/sum 8, L_000001ab0ec517a0, L_000001ab0ec51700;
L_000001ab0ec526a0 .cmp/eq 3, L_000001ab0ec52060, L_000001ab0ebf81c8;
L_000001ab0ec51fc0 .concat [ 8 1 0 0], L_000001ab0ec51de0, L_000001ab0ebf8210;
L_000001ab0ec52ce0 .arith/sum 9, L_000001ab0ec51fc0, L_000001ab0ebf8258;
L_000001ab0ec52240 .concat [ 8 1 0 0], L_000001ab0ec51de0, L_000001ab0ebf82a0;
L_000001ab0ec52100 .functor MUXZ 9, L_000001ab0ec52240, L_000001ab0ec52ce0, L_000001ab0ec526a0, C4<>;
L_000001ab0ec521a0 .cmp/eq 3, L_000001ab0ec52060, L_000001ab0ebf82e8;
L_000001ab0ec51ca0 .functor MUXZ 3, L_000001ab0ec52060, L_000001ab0ebf8330, L_000001ab0ec521a0, C4<>;
S_000001ab0eabd770 .scope function.vec4.s32, "sqrt_approx" "sqrt_approx" 4 114, 4 114 0, S_000001ab0ea07510;
 .timescale -9 -12;
; Variable sqrt_approx is vec4 return value of scope S_000001ab0eabd770
v000001ab0ebdf3e0_0 .var "x", 31 0;
v000001ab0ebdfde0_0 .var "x_div_y0", 63 0;
v000001ab0ebdeb20_0 .var "x_div_y1", 63 0;
v000001ab0ebdff20_0 .var "y0", 31 0;
v000001ab0ebe0100_0 .var "y1", 31 0;
v000001ab0ebded00_0 .var "y2", 31 0;
TD_sphere3_fsm_32bit_simple_tb.dut.sphere_inst.sqrt_approx ;
    %load/vec4 v000001ab0ebdf3e0_0;
    %addi 32768, 0, 32;
    %store/vec4 v000001ab0ebdff20_0, 0, 32;
    %load/vec4 v000001ab0ebdff20_0;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_1.0, 4;
    %load/vec4 v000001ab0ebdf3e0_0;
    %pad/u 64;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %load/vec4 v000001ab0ebdff20_0;
    %pad/u 64;
    %div;
    %store/vec4 v000001ab0ebdfde0_0, 0, 64;
    %load/vec4 v000001ab0ebdff20_0;
    %load/vec4 v000001ab0ebdfde0_0;
    %parti/s 32, 0, 2;
    %add;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %store/vec4 v000001ab0ebe0100_0, 0, 32;
    %jmp T_1.1;
T_1.0 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001ab0ebe0100_0, 0, 32;
T_1.1 ;
    %load/vec4 v000001ab0ebe0100_0;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_1.2, 4;
    %load/vec4 v000001ab0ebdf3e0_0;
    %pad/u 64;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %load/vec4 v000001ab0ebe0100_0;
    %pad/u 64;
    %div;
    %store/vec4 v000001ab0ebdeb20_0, 0, 64;
    %load/vec4 v000001ab0ebe0100_0;
    %load/vec4 v000001ab0ebdeb20_0;
    %parti/s 32, 0, 2;
    %add;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %store/vec4 v000001ab0ebded00_0, 0, 32;
    %jmp T_1.3;
T_1.2 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001ab0ebded00_0, 0, 32;
T_1.3 ;
    %load/vec4 v000001ab0ebded00_0;
    %ret/vec4 0, 0, 32;  Assign to sqrt_approx (store_vec4_to_lval)
    %end;
S_000001ab0ebe02c0 .scope module, "vdc_inst" "vdcorput_fsm_32bit_simple" 4 89, 7 9 0, S_000001ab0ea07510;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "k_in";
    .port_info 4 /INPUT 2 "base_sel";
    .port_info 5 /OUTPUT 32 "result";
    .port_info 6 /OUTPUT 1 "done";
    .port_info 7 /OUTPUT 1 "ready";
P_000001ab0ebe0450 .param/l "ACCUMULATE" 0 7 24, C4<011>;
P_000001ab0ebe0488 .param/l "CHECK" 0 7 26, C4<101>;
P_000001ab0ebe04c0 .param/l "DIVIDE" 0 7 23, C4<010>;
P_000001ab0ebe04f8 .param/l "FINISH" 0 7 27, C4<110>;
P_000001ab0ebe0530 .param/l "FP_HALF" 0 7 41, C4<00000000000000001000000000000000>;
P_000001ab0ebe0568 .param/l "FP_ONE" 0 7 40, C4<00000000000000010000000000000000>;
P_000001ab0ebe05a0 .param/l "FP_SEVENTH" 0 7 43, C4<00000000000000000010010010010010>;
P_000001ab0ebe05d8 .param/l "FP_THIRD" 0 7 42, C4<00000000000000000101010101010101>;
P_000001ab0ebe0610 .param/l "IDLE" 0 7 21, C4<000>;
P_000001ab0ebe0648 .param/l "INIT" 0 7 22, C4<001>;
P_000001ab0ebe0680 .param/l "UPDATE" 0 7 25, C4<100>;
v000001ab0ebe3ab0_0 .var "acc_reg", 31 0;
v000001ab0ebe3fb0_0 .var "base_reg", 31 0;
v000001ab0ebe3790_0 .net "base_sel", 1 0, v000001ab0ebefe40_0;  alias, 1 drivers
v000001ab0ebe2d90_0 .net "clk", 0 0, v000001ab0ebef080_0;  alias, 1 drivers
v000001ab0ebe4410_0 .var "current_state", 2 0;
v000001ab0ebe45f0_0 .net "div3_quotient", 7 0, L_000001ab0ebf57e0;  1 drivers
v000001ab0ebe4690_0 .net "div3_remainder", 1 0, L_000001ab0ec4f7c0;  1 drivers
v000001ab0ebe31f0_0 .net "div7_quotient", 8 0, L_000001ab0ec4f5e0;  1 drivers
v000001ab0ebe4870_0 .net "div7_remainder", 2 0, L_000001ab0ec4f2c0;  1 drivers
v000001ab0ebe3510_0 .var "done", 0 0;
v000001ab0ebe4af0_0 .net "k_in", 31 0, v000001ab0ebe5240_0;  alias, 1 drivers
v000001ab0ebe38d0_0 .var "k_reg", 31 0;
v000001ab0ebe40f0_0 .var "next_state", 2 0;
v000001ab0ebe3970_0 .var "power_reg", 31 0;
v000001ab0ebe3bf0_0 .var "quotient_reg", 31 0;
v000001ab0ebe4230_0 .var "ready", 0 0;
v000001ab0ebe3c90_0 .var "remainder_reg", 31 0;
v000001ab0ebe44b0_0 .var "result", 31 0;
v000001ab0ebe47d0_0 .net "rst_n", 0 0, v000001ab0ebf3e40_0;  alias, 1 drivers
v000001ab0ebe3d30_0 .net "start", 0 0, v000001ab0ebe5600_0;  1 drivers
E_000001ab0eb784f0 .event anyedge, v000001ab0ebe4410_0, v000001ab0ebe3d30_0, v000001ab0ebe38d0_0;
L_000001ab0ec51340 .part v000001ab0ebe38d0_0, 0, 8;
L_000001ab0ec50f80 .part v000001ab0ebe38d0_0, 0, 9;
S_000001ab0ebe06c0 .scope module, "div3_inst" "div_mod_3" 7 52, 8 28 0, S_000001ab0ebe02c0;
 .timescale -9 -12;
    .port_info 0 /INPUT 8 "n";
    .port_info 1 /OUTPUT 8 "quotient";
    .port_info 2 /OUTPUT 2 "remainder";
L_000001ab0ebf7400 .functor BUFT 1, C4<00000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebde300_0 .net *"_ivl_11", 4 0, L_000001ab0ebf7400;  1 drivers
v000001ab0ebe01a0_0 .net *"_ivl_18", 5 0, L_000001ab0ebf66e0;  1 drivers
L_000001ab0ebf7448 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdee40_0 .net *"_ivl_21", 0 0, L_000001ab0ebf7448;  1 drivers
v000001ab0ebdfb60_0 .net *"_ivl_22", 5 0, L_000001ab0ebf5740;  1 drivers
L_000001ab0ebf7490 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebde440_0 .net *"_ivl_25", 3 0, L_000001ab0ebf7490;  1 drivers
v000001ab0ebdeee0_0 .net *"_ivl_32", 4 0, L_000001ab0ebf6aa0;  1 drivers
L_000001ab0ebf74d8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdf2a0_0 .net *"_ivl_35", 0 0, L_000001ab0ebf74d8;  1 drivers
v000001ab0ebdf480_0 .net *"_ivl_36", 4 0, L_000001ab0ebf5c40;  1 drivers
L_000001ab0ebf7520 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebdf660_0 .net *"_ivl_39", 2 0, L_000001ab0ebf7520;  1 drivers
v000001ab0ebdf7a0_0 .net *"_ivl_4", 6 0, L_000001ab0ebf5880;  1 drivers
v000001ab0ebde4e0_0 .net *"_ivl_43", 2 0, L_000001ab0ebf6000;  1 drivers
v000001ab0ebe10c0_0 .net *"_ivl_50", 7 0, L_000001ab0ebf5560;  1 drivers
L_000001ab0ebf7568 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe2240_0 .net *"_ivl_53", 1 0, L_000001ab0ebf7568;  1 drivers
v000001ab0ebe18e0_0 .net *"_ivl_54", 7 0, L_000001ab0ebf5600;  1 drivers
L_000001ab0ebf75b0 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe21a0_0 .net *"_ivl_57", 2 0, L_000001ab0ebf75b0;  1 drivers
v000001ab0ebe2600_0 .net *"_ivl_58", 7 0, L_000001ab0ebf60a0;  1 drivers
v000001ab0ebe1ac0_0 .net *"_ivl_60", 7 0, L_000001ab0ebf6500;  1 drivers
L_000001ab0ebf75f8 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe1ca0_0 .net *"_ivl_63", 3 0, L_000001ab0ebf75f8;  1 drivers
v000001ab0ebe1d40_0 .net *"_ivl_64", 7 0, L_000001ab0ebf54c0;  1 drivers
v000001ab0ebe22e0_0 .net *"_ivl_66", 7 0, L_000001ab0ebf65a0;  1 drivers
L_000001ab0ebf7640 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe1c00_0 .net *"_ivl_69", 5 0, L_000001ab0ebf7640;  1 drivers
L_000001ab0ebf73b8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe2380_0 .net *"_ivl_7", 0 0, L_000001ab0ebf73b8;  1 drivers
L_000001ab0ebf7688 .functor BUFT 1, C4<11>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe1a20_0 .net/2u *"_ivl_72", 1 0, L_000001ab0ebf7688;  1 drivers
v000001ab0ebe2420_0 .net *"_ivl_74", 0 0, L_000001ab0ebf6640;  1 drivers
L_000001ab0ebf76d0 .functor BUFT 1, C4<00000001>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe1de0_0 .net/2u *"_ivl_76", 7 0, L_000001ab0ebf76d0;  1 drivers
v000001ab0ebe0a80_0 .net *"_ivl_78", 7 0, L_000001ab0ebf6960;  1 drivers
v000001ab0ebe2100_0 .net *"_ivl_8", 6 0, L_000001ab0ebf5ec0;  1 drivers
L_000001ab0ebf7718 .functor BUFT 1, C4<11>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe0b20_0 .net/2u *"_ivl_82", 1 0, L_000001ab0ebf7718;  1 drivers
v000001ab0ebe08a0_0 .net *"_ivl_84", 0 0, L_000001ab0ec50e40;  1 drivers
L_000001ab0ebf7760 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe1980_0 .net/2u *"_ivl_86", 1 0, L_000001ab0ebf7760;  1 drivers
v000001ab0ebe24c0_0 .net "n", 7 0, L_000001ab0ec51340;  1 drivers
v000001ab0ebe1660_0 .net "q1", 5 0, L_000001ab0ebf5d80;  1 drivers
v000001ab0ebe2560_0 .net "q2", 4 0, L_000001ab0ebf6320;  1 drivers
v000001ab0ebe0e40_0 .net "q3", 3 0, L_000001ab0ebf68c0;  1 drivers
v000001ab0ebe1700_0 .net "q4", 1 0, L_000001ab0ebf5ba0;  1 drivers
v000001ab0ebe1020_0 .net "quotient", 7 0, L_000001ab0ebf57e0;  alias, 1 drivers
v000001ab0ebe1b60_0 .net "quotient_sum", 7 0, L_000001ab0ebf6140;  1 drivers
v000001ab0ebe0ee0_0 .net "r1", 1 0, L_000001ab0ebf6460;  1 drivers
v000001ab0ebe26a0_0 .net "r2", 1 0, L_000001ab0ebf6820;  1 drivers
v000001ab0ebe2740_0 .net "r3", 1 0, L_000001ab0ebf5b00;  1 drivers
v000001ab0ebe0bc0_0 .net "r4", 1 0, L_000001ab0ebf5f60;  1 drivers
v000001ab0ebe0c60_0 .net "rem1", 6 0, L_000001ab0ebf59c0;  1 drivers
v000001ab0ebe1e80_0 .net "rem2", 5 0, L_000001ab0ebf5a60;  1 drivers
v000001ab0ebe0f80_0 .net "rem3", 4 0, L_000001ab0ebf6280;  1 drivers
v000001ab0ebe0940_0 .net "rem4", 1 0, L_000001ab0ebf6a00;  1 drivers
v000001ab0ebe15c0_0 .net "remainder", 1 0, L_000001ab0ec4f7c0;  alias, 1 drivers
L_000001ab0ebf5d80 .part L_000001ab0ec51340, 2, 6;
L_000001ab0ebf6460 .part L_000001ab0ec51340, 0, 2;
L_000001ab0ebf5880 .concat [ 6 1 0 0], L_000001ab0ebf5d80, L_000001ab0ebf73b8;
L_000001ab0ebf5ec0 .concat [ 2 5 0 0], L_000001ab0ebf6460, L_000001ab0ebf7400;
L_000001ab0ebf59c0 .arith/sum 7, L_000001ab0ebf5880, L_000001ab0ebf5ec0;
L_000001ab0ebf6320 .part L_000001ab0ebf59c0, 2, 5;
L_000001ab0ebf6820 .part L_000001ab0ebf59c0, 0, 2;
L_000001ab0ebf66e0 .concat [ 5 1 0 0], L_000001ab0ebf6320, L_000001ab0ebf7448;
L_000001ab0ebf5740 .concat [ 2 4 0 0], L_000001ab0ebf6820, L_000001ab0ebf7490;
L_000001ab0ebf5a60 .arith/sum 6, L_000001ab0ebf66e0, L_000001ab0ebf5740;
L_000001ab0ebf68c0 .part L_000001ab0ebf5a60, 2, 4;
L_000001ab0ebf5b00 .part L_000001ab0ebf5a60, 0, 2;
L_000001ab0ebf6aa0 .concat [ 4 1 0 0], L_000001ab0ebf68c0, L_000001ab0ebf74d8;
L_000001ab0ebf5c40 .concat [ 2 3 0 0], L_000001ab0ebf5b00, L_000001ab0ebf7520;
L_000001ab0ebf6280 .arith/sum 5, L_000001ab0ebf6aa0, L_000001ab0ebf5c40;
L_000001ab0ebf6000 .part L_000001ab0ebf6280, 2, 3;
L_000001ab0ebf5ba0 .part L_000001ab0ebf6000, 0, 2;
L_000001ab0ebf5f60 .part L_000001ab0ebf6280, 0, 2;
L_000001ab0ebf6a00 .arith/sum 2, L_000001ab0ebf5ba0, L_000001ab0ebf5f60;
L_000001ab0ebf5560 .concat [ 6 2 0 0], L_000001ab0ebf5d80, L_000001ab0ebf7568;
L_000001ab0ebf5600 .concat [ 5 3 0 0], L_000001ab0ebf6320, L_000001ab0ebf75b0;
L_000001ab0ebf60a0 .arith/sum 8, L_000001ab0ebf5560, L_000001ab0ebf5600;
L_000001ab0ebf6500 .concat [ 4 4 0 0], L_000001ab0ebf68c0, L_000001ab0ebf75f8;
L_000001ab0ebf54c0 .arith/sum 8, L_000001ab0ebf60a0, L_000001ab0ebf6500;
L_000001ab0ebf65a0 .concat [ 2 6 0 0], L_000001ab0ebf5ba0, L_000001ab0ebf7640;
L_000001ab0ebf6140 .arith/sum 8, L_000001ab0ebf54c0, L_000001ab0ebf65a0;
L_000001ab0ebf6640 .cmp/eq 2, L_000001ab0ebf6a00, L_000001ab0ebf7688;
L_000001ab0ebf6960 .arith/sum 8, L_000001ab0ebf6140, L_000001ab0ebf76d0;
L_000001ab0ebf57e0 .functor MUXZ 8, L_000001ab0ebf6140, L_000001ab0ebf6960, L_000001ab0ebf6640, C4<>;
L_000001ab0ec50e40 .cmp/eq 2, L_000001ab0ebf6a00, L_000001ab0ebf7718;
L_000001ab0ec4f7c0 .functor MUXZ 2, L_000001ab0ebf6a00, L_000001ab0ebf7760, L_000001ab0ec50e40, C4<>;
S_000001ab0ebe2a70 .scope module, "div7_inst" "div_mod_7" 7 58, 9 14 0, S_000001ab0ebe02c0;
 .timescale -9 -12;
    .port_info 0 /INPUT 9 "n";
    .port_info 1 /OUTPUT 9 "quotient";
    .port_info 2 /OUTPUT 3 "remainder";
L_000001ab0ebf77f0 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe09e0_0 .net *"_ivl_11", 3 0, L_000001ab0ebf77f0;  1 drivers
v000001ab0ebe1200_0 .net *"_ivl_18", 4 0, L_000001ab0ec4ffe0;  1 drivers
L_000001ab0ebf7838 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe1fc0_0 .net *"_ivl_21", 0 0, L_000001ab0ebf7838;  1 drivers
v000001ab0ebe17a0_0 .net *"_ivl_22", 4 0, L_000001ab0ec4fea0;  1 drivers
L_000001ab0ebf7880 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe1f20_0 .net *"_ivl_25", 1 0, L_000001ab0ebf7880;  1 drivers
v000001ab0ebe0d00_0 .net *"_ivl_32", 2 0, L_000001ab0ec51020;  1 drivers
L_000001ab0ebf78c8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe0da0_0 .net *"_ivl_35", 0 0, L_000001ab0ebf78c8;  1 drivers
v000001ab0ebe1160_0 .net *"_ivl_38", 7 0, L_000001ab0ec50b20;  1 drivers
v000001ab0ebe2060_0 .net *"_ivl_4", 6 0, L_000001ab0ec50120;  1 drivers
L_000001ab0ebf7910 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe12a0_0 .net *"_ivl_41", 1 0, L_000001ab0ebf7910;  1 drivers
v000001ab0ebe1840_0 .net *"_ivl_42", 7 0, L_000001ab0ec4fae0;  1 drivers
L_000001ab0ebf7958 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe1340_0 .net *"_ivl_45", 3 0, L_000001ab0ebf7958;  1 drivers
v000001ab0ebe13e0_0 .net *"_ivl_46", 7 0, L_000001ab0ec4f720;  1 drivers
v000001ab0ebe1480_0 .net *"_ivl_48", 7 0, L_000001ab0ec4ee60;  1 drivers
L_000001ab0ebf79a0 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe1520_0 .net *"_ivl_51", 5 0, L_000001ab0ebf79a0;  1 drivers
L_000001ab0ebf79e8 .functor BUFT 1, C4<111>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe2ed0_0 .net/2u *"_ivl_54", 2 0, L_000001ab0ebf79e8;  1 drivers
v000001ab0ebe3010_0 .net *"_ivl_56", 0 0, L_000001ab0ec4f860;  1 drivers
v000001ab0ebe3b50_0 .net *"_ivl_58", 8 0, L_000001ab0ec50260;  1 drivers
L_000001ab0ebf7a30 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe4730_0 .net *"_ivl_61", 0 0, L_000001ab0ebf7a30;  1 drivers
L_000001ab0ebf7a78 .functor BUFT 1, C4<000000001>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe3f10_0 .net/2u *"_ivl_62", 8 0, L_000001ab0ebf7a78;  1 drivers
v000001ab0ebe4190_0 .net *"_ivl_64", 8 0, L_000001ab0ec50760;  1 drivers
v000001ab0ebe3330_0 .net *"_ivl_66", 8 0, L_000001ab0ec4fcc0;  1 drivers
L_000001ab0ebf7ac0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe4050_0 .net *"_ivl_69", 0 0, L_000001ab0ebf7ac0;  1 drivers
L_000001ab0ebf77a8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe3e70_0 .net *"_ivl_7", 0 0, L_000001ab0ebf77a8;  1 drivers
L_000001ab0ebf7b08 .functor BUFT 1, C4<111>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe3a10_0 .net/2u *"_ivl_72", 2 0, L_000001ab0ebf7b08;  1 drivers
v000001ab0ebe2e30_0 .net *"_ivl_74", 0 0, L_000001ab0ec4fd60;  1 drivers
L_000001ab0ebf7b50 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe3830_0 .net/2u *"_ivl_76", 2 0, L_000001ab0ebf7b50;  1 drivers
v000001ab0ebe2f70_0 .net *"_ivl_8", 6 0, L_000001ab0ec4fe00;  1 drivers
v000001ab0ebe3470_0 .net "n", 8 0, L_000001ab0ec50f80;  1 drivers
v000001ab0ebe49b0_0 .net "q1", 5 0, L_000001ab0ec4f900;  1 drivers
v000001ab0ebe4a50_0 .net "q2", 3 0, L_000001ab0ec4f180;  1 drivers
v000001ab0ebe35b0_0 .net "q3", 1 0, L_000001ab0ec4f220;  1 drivers
v000001ab0ebe3dd0_0 .net "quotient", 8 0, L_000001ab0ec4f5e0;  alias, 1 drivers
v000001ab0ebe3650_0 .net "quotient_sum", 7 0, L_000001ab0ec50ee0;  1 drivers
v000001ab0ebe3290_0 .net "r1", 2 0, L_000001ab0ec4ff40;  1 drivers
v000001ab0ebe30b0_0 .net "r2", 2 0, L_000001ab0ec509e0;  1 drivers
v000001ab0ebe2cf0_0 .net "r3", 2 0, L_000001ab0ec50080;  1 drivers
v000001ab0ebe33d0_0 .net "rem1", 6 0, L_000001ab0ec4f0e0;  1 drivers
v000001ab0ebe36f0_0 .net "rem2", 4 0, L_000001ab0ec501c0;  1 drivers
v000001ab0ebe2c50_0 .net "rem3", 2 0, L_000001ab0ec513e0;  1 drivers
v000001ab0ebe3150_0 .net "remainder", 2 0, L_000001ab0ec4f2c0;  alias, 1 drivers
L_000001ab0ec4f900 .part L_000001ab0ec50f80, 3, 6;
L_000001ab0ec4ff40 .part L_000001ab0ec50f80, 0, 3;
L_000001ab0ec50120 .concat [ 6 1 0 0], L_000001ab0ec4f900, L_000001ab0ebf77a8;
L_000001ab0ec4fe00 .concat [ 3 4 0 0], L_000001ab0ec4ff40, L_000001ab0ebf77f0;
L_000001ab0ec4f0e0 .arith/sum 7, L_000001ab0ec50120, L_000001ab0ec4fe00;
L_000001ab0ec4f180 .part L_000001ab0ec4f0e0, 3, 4;
L_000001ab0ec509e0 .part L_000001ab0ec4f0e0, 0, 3;
L_000001ab0ec4ffe0 .concat [ 4 1 0 0], L_000001ab0ec4f180, L_000001ab0ebf7838;
L_000001ab0ec4fea0 .concat [ 3 2 0 0], L_000001ab0ec509e0, L_000001ab0ebf7880;
L_000001ab0ec501c0 .arith/sum 5, L_000001ab0ec4ffe0, L_000001ab0ec4fea0;
L_000001ab0ec4f220 .part L_000001ab0ec501c0, 3, 2;
L_000001ab0ec50080 .part L_000001ab0ec501c0, 0, 3;
L_000001ab0ec51020 .concat [ 2 1 0 0], L_000001ab0ec4f220, L_000001ab0ebf78c8;
L_000001ab0ec513e0 .arith/sum 3, L_000001ab0ec51020, L_000001ab0ec50080;
L_000001ab0ec50b20 .concat [ 6 2 0 0], L_000001ab0ec4f900, L_000001ab0ebf7910;
L_000001ab0ec4fae0 .concat [ 4 4 0 0], L_000001ab0ec4f180, L_000001ab0ebf7958;
L_000001ab0ec4f720 .arith/sum 8, L_000001ab0ec50b20, L_000001ab0ec4fae0;
L_000001ab0ec4ee60 .concat [ 2 6 0 0], L_000001ab0ec4f220, L_000001ab0ebf79a0;
L_000001ab0ec50ee0 .arith/sum 8, L_000001ab0ec4f720, L_000001ab0ec4ee60;
L_000001ab0ec4f860 .cmp/eq 3, L_000001ab0ec513e0, L_000001ab0ebf79e8;
L_000001ab0ec50260 .concat [ 8 1 0 0], L_000001ab0ec50ee0, L_000001ab0ebf7a30;
L_000001ab0ec50760 .arith/sum 9, L_000001ab0ec50260, L_000001ab0ebf7a78;
L_000001ab0ec4fcc0 .concat [ 8 1 0 0], L_000001ab0ec50ee0, L_000001ab0ebf7ac0;
L_000001ab0ec4f5e0 .functor MUXZ 9, L_000001ab0ec4fcc0, L_000001ab0ec50760, L_000001ab0ec4f860, C4<>;
L_000001ab0ec4fd60 .cmp/eq 3, L_000001ab0ec513e0, L_000001ab0ebf7b08;
L_000001ab0ec4f2c0 .functor MUXZ 3, L_000001ab0ec513e0, L_000001ab0ebf7b50, L_000001ab0ec4fd60, C4<>;
S_000001ab0ebeae40 .scope module, "trig_inst" "cordic_trig_16bit_simple_fixed" 3 136, 6 22 0, S_000001ab0ea7e4b0;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 16 "angle";
    .port_info 4 /OUTPUT 32 "cosine";
    .port_info 5 /OUTPUT 32 "sine";
    .port_info 6 /OUTPUT 1 "done";
    .port_info 7 /OUTPUT 1 "ready";
P_000001ab0eab7f00 .param/l "COMPUTE" 0 6 35, C4<01>;
P_000001ab0eab7f38 .param/l "FINISH" 0 6 36, C4<10>;
P_000001ab0eab7f70 .param/l "IDLE" 0 6 34, C4<00>;
P_000001ab0eab7fa8 .param/l "K" 0 6 58, C4<01001101101110101>;
v000001ab0ebe5a60_0 .net "angle", 15 0, L_000001ab0ec522e0;  1 drivers
v000001ab0ebe61e0_0 .var "angle_reg", 15 0;
v000001ab0ebe6dc0 .array "atan_table", 15 0, 15 0;
v000001ab0ebe63c0_0 .net "clk", 0 0, v000001ab0ebef080_0;  alias, 1 drivers
v000001ab0ebe5560_0 .var "cos_result", 31 0;
v000001ab0ebe6780_0 .var "cosine", 31 0;
v000001ab0ebe6140_0 .var "done", 0 0;
v000001ab0ebe4fc0_0 .var "iteration", 3 0;
v000001ab0ebe7360_0 .var "next_state", 1 0;
v000001ab0ebe5100_0 .var "ready", 0 0;
v000001ab0ebe6be0_0 .var "reduced_angle", 15 0;
v000001ab0ebe6c80_0 .net "rst_n", 0 0, v000001ab0ebf3e40_0;  alias, 1 drivers
v000001ab0ebe6460_0 .var "sin_result", 31 0;
v000001ab0ebe6320_0 .var "sine", 31 0;
v000001ab0ebe68c0_0 .net "start", 0 0, v000001ab0ebef8a0_0;  1 drivers
v000001ab0ebe5740_0 .var "state", 1 0;
v000001ab0ebe7040_0 .var "x", 16 0;
v000001ab0ebe51a0_0 .var "x_scaled", 31 0;
v000001ab0ebe7180_0 .var "y", 16 0;
v000001ab0ebe6500_0 .var "y_scaled", 31 0;
v000001ab0ebe5380_0 .var "z", 15 0;
E_000001ab0eb785b0 .event anyedge, v000001ab0ebe5740_0, v000001ab0ebe68c0_0, v000001ab0ebe4fc0_0;
S_000001ab0ebeafd0 .scope module, "vdc_inst" "vdcorput_fsm_32bit_simple" 3 109, 7 9 0, S_000001ab0ea7e4b0;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "k_in";
    .port_info 4 /INPUT 2 "base_sel";
    .port_info 5 /OUTPUT 32 "result";
    .port_info 6 /OUTPUT 1 "done";
    .port_info 7 /OUTPUT 1 "ready";
P_000001ab0ebeb160 .param/l "ACCUMULATE" 0 7 24, C4<011>;
P_000001ab0ebeb198 .param/l "CHECK" 0 7 26, C4<101>;
P_000001ab0ebeb1d0 .param/l "DIVIDE" 0 7 23, C4<010>;
P_000001ab0ebeb208 .param/l "FINISH" 0 7 27, C4<110>;
P_000001ab0ebeb240 .param/l "FP_HALF" 0 7 41, C4<00000000000000001000000000000000>;
P_000001ab0ebeb278 .param/l "FP_ONE" 0 7 40, C4<00000000000000010000000000000000>;
P_000001ab0ebeb2b0 .param/l "FP_SEVENTH" 0 7 43, C4<00000000000000000010010010010010>;
P_000001ab0ebeb2e8 .param/l "FP_THIRD" 0 7 42, C4<00000000000000000101010101010101>;
P_000001ab0ebeb320 .param/l "IDLE" 0 7 21, C4<000>;
P_000001ab0ebeb358 .param/l "INIT" 0 7 22, C4<001>;
P_000001ab0ebeb390 .param/l "UPDATE" 0 7 25, C4<100>;
v000001ab0ebee040_0 .var "acc_reg", 31 0;
v000001ab0ebee2c0_0 .var "base_reg", 31 0;
v000001ab0ebed640_0 .net "base_sel", 1 0, v000001ab0ebefda0_0;  alias, 1 drivers
v000001ab0ebedf00_0 .net "clk", 0 0, v000001ab0ebef080_0;  alias, 1 drivers
v000001ab0ebed280_0 .var "current_state", 2 0;
v000001ab0ebee0e0_0 .net "div3_quotient", 7 0, L_000001ab0ebf4fc0;  1 drivers
v000001ab0ebed6e0_0 .net "div3_remainder", 1 0, L_000001ab0ebf5240;  1 drivers
v000001ab0ebecd80_0 .net "div7_quotient", 8 0, L_000001ab0ebf5ce0;  1 drivers
v000001ab0ebed320_0 .net "div7_remainder", 2 0, L_000001ab0ebf6780;  1 drivers
v000001ab0ebee900_0 .var "done", 0 0;
v000001ab0ebeee00_0 .net "k_in", 31 0, v000001ab0ebeeb80_0;  alias, 1 drivers
v000001ab0ebec920_0 .var "k_reg", 31 0;
v000001ab0ebed460_0 .var "next_state", 2 0;
v000001ab0ebed820_0 .var "power_reg", 31 0;
v000001ab0ebede60_0 .var "quotient_reg", 31 0;
v000001ab0ebeda00_0 .var "ready", 0 0;
v000001ab0ebed500_0 .var "remainder_reg", 31 0;
v000001ab0ebee4a0_0 .var "result", 31 0;
v000001ab0ebeeea0_0 .net "rst_n", 0 0, v000001ab0ebf3e40_0;  alias, 1 drivers
v000001ab0ebeef40_0 .net "start", 0 0, v000001ab0ebefbc0_0;  1 drivers
E_000001ab0eb785f0 .event anyedge, v000001ab0ebed280_0, v000001ab0ebeef40_0, v000001ab0ebec920_0;
L_000001ab0ebf3760 .part v000001ab0ebec920_0, 0, 8;
L_000001ab0ebf61e0 .part v000001ab0ebec920_0, 0, 9;
S_000001ab0ebeb3d0 .scope module, "div3_inst" "div_mod_3" 7 52, 8 28 0, S_000001ab0ebeafd0;
 .timescale -9 -12;
    .port_info 0 /INPUT 8 "n";
    .port_info 1 /OUTPUT 8 "quotient";
    .port_info 2 /OUTPUT 2 "remainder";
L_000001ab0ebf6c20 .functor BUFT 1, C4<00000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe6fa0_0 .net *"_ivl_11", 4 0, L_000001ab0ebf6c20;  1 drivers
v000001ab0ebe6a00_0 .net *"_ivl_18", 5 0, L_000001ab0ebf3120;  1 drivers
L_000001ab0ebf6c68 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe5420_0 .net *"_ivl_21", 0 0, L_000001ab0ebf6c68;  1 drivers
v000001ab0ebe65a0_0 .net *"_ivl_22", 5 0, L_000001ab0ebf47a0;  1 drivers
L_000001ab0ebf6cb0 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe56a0_0 .net *"_ivl_25", 3 0, L_000001ab0ebf6cb0;  1 drivers
v000001ab0ebe6e60_0 .net *"_ivl_32", 4 0, L_000001ab0ebf48e0;  1 drivers
L_000001ab0ebf6cf8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe59c0_0 .net *"_ivl_35", 0 0, L_000001ab0ebf6cf8;  1 drivers
v000001ab0ebe5b00_0 .net *"_ivl_36", 4 0, L_000001ab0ebf33a0;  1 drivers
L_000001ab0ebf6d40 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe7220_0 .net *"_ivl_39", 2 0, L_000001ab0ebf6d40;  1 drivers
v000001ab0ebe6f00_0 .net *"_ivl_4", 6 0, L_000001ab0ebf4ac0;  1 drivers
v000001ab0ebe5ba0_0 .net *"_ivl_43", 2 0, L_000001ab0ebf34e0;  1 drivers
v000001ab0ebe5ce0_0 .net *"_ivl_50", 7 0, L_000001ab0ebf3b20;  1 drivers
L_000001ab0ebf6d88 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe72c0_0 .net *"_ivl_53", 1 0, L_000001ab0ebf6d88;  1 drivers
v000001ab0ebe5d80_0 .net *"_ivl_54", 7 0, L_000001ab0ebf4de0;  1 drivers
L_000001ab0ebf6dd0 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe5e20_0 .net *"_ivl_57", 2 0, L_000001ab0ebf6dd0;  1 drivers
v000001ab0ebe5ec0_0 .net *"_ivl_58", 7 0, L_000001ab0ebf4840;  1 drivers
v000001ab0ebe5f60_0 .net *"_ivl_60", 7 0, L_000001ab0ebf4b60;  1 drivers
L_000001ab0ebf6e18 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe60a0_0 .net *"_ivl_63", 3 0, L_000001ab0ebf6e18;  1 drivers
v000001ab0ebe7cc0_0 .net *"_ivl_64", 7 0, L_000001ab0ebf3800;  1 drivers
v000001ab0ebe7d60_0 .net *"_ivl_66", 7 0, L_000001ab0ebf36c0;  1 drivers
L_000001ab0ebf6e60 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe83a0_0 .net *"_ivl_69", 5 0, L_000001ab0ebf6e60;  1 drivers
L_000001ab0ebf6bd8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe7e00_0 .net *"_ivl_7", 0 0, L_000001ab0ebf6bd8;  1 drivers
L_000001ab0ebf6ea8 .functor BUFT 1, C4<11>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe7ae0_0 .net/2u *"_ivl_72", 1 0, L_000001ab0ebf6ea8;  1 drivers
v000001ab0ebe79a0_0 .net *"_ivl_74", 0 0, L_000001ab0ebf31c0;  1 drivers
L_000001ab0ebf6ef0 .functor BUFT 1, C4<00000001>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe7f40_0 .net/2u *"_ivl_76", 7 0, L_000001ab0ebf6ef0;  1 drivers
v000001ab0ebe7680_0 .net *"_ivl_78", 7 0, L_000001ab0ebf4f20;  1 drivers
v000001ab0ebe8080_0 .net *"_ivl_8", 6 0, L_000001ab0ebf42a0;  1 drivers
L_000001ab0ebf6f38 .functor BUFT 1, C4<11>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe8120_0 .net/2u *"_ivl_82", 1 0, L_000001ab0ebf6f38;  1 drivers
v000001ab0ebe88a0_0 .net *"_ivl_84", 0 0, L_000001ab0ebf3260;  1 drivers
L_000001ab0ebf6f80 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe7fe0_0 .net/2u *"_ivl_86", 1 0, L_000001ab0ebf6f80;  1 drivers
v000001ab0ebe8440_0 .net "n", 7 0, L_000001ab0ebf3760;  1 drivers
v000001ab0ebe81c0_0 .net "q1", 5 0, L_000001ab0ebf2d60;  1 drivers
v000001ab0ebe7900_0 .net "q2", 4 0, L_000001ab0ebf52e0;  1 drivers
v000001ab0ebe8580_0 .net "q3", 3 0, L_000001ab0ebf2c20;  1 drivers
v000001ab0ebe8d00_0 .net "q4", 1 0, L_000001ab0ebf4700;  1 drivers
v000001ab0ebe7720_0 .net "quotient", 7 0, L_000001ab0ebf4fc0;  alias, 1 drivers
v000001ab0ebe8260_0 .net "quotient_sum", 7 0, L_000001ab0ebf4c00;  1 drivers
v000001ab0ebe77c0_0 .net "r1", 1 0, L_000001ab0ebf40c0;  1 drivers
v000001ab0ebe8300_0 .net "r2", 1 0, L_000001ab0ebf2ea0;  1 drivers
v000001ab0ebe7c20_0 .net "r3", 1 0, L_000001ab0ebf4ca0;  1 drivers
v000001ab0ebe7ea0_0 .net "r4", 1 0, L_000001ab0ebf4980;  1 drivers
v000001ab0ebe7860_0 .net "rem1", 6 0, L_000001ab0ebf2e00;  1 drivers
v000001ab0ebe84e0_0 .net "rem2", 5 0, L_000001ab0ebf43e0;  1 drivers
v000001ab0ebe89e0_0 .net "rem3", 4 0, L_000001ab0ebf4520;  1 drivers
v000001ab0ebe7a40_0 .net "rem4", 1 0, L_000001ab0ebf4a20;  1 drivers
v000001ab0ebe8bc0_0 .net "remainder", 1 0, L_000001ab0ebf5240;  alias, 1 drivers
L_000001ab0ebf2d60 .part L_000001ab0ebf3760, 2, 6;
L_000001ab0ebf40c0 .part L_000001ab0ebf3760, 0, 2;
L_000001ab0ebf4ac0 .concat [ 6 1 0 0], L_000001ab0ebf2d60, L_000001ab0ebf6bd8;
L_000001ab0ebf42a0 .concat [ 2 5 0 0], L_000001ab0ebf40c0, L_000001ab0ebf6c20;
L_000001ab0ebf2e00 .arith/sum 7, L_000001ab0ebf4ac0, L_000001ab0ebf42a0;
L_000001ab0ebf52e0 .part L_000001ab0ebf2e00, 2, 5;
L_000001ab0ebf2ea0 .part L_000001ab0ebf2e00, 0, 2;
L_000001ab0ebf3120 .concat [ 5 1 0 0], L_000001ab0ebf52e0, L_000001ab0ebf6c68;
L_000001ab0ebf47a0 .concat [ 2 4 0 0], L_000001ab0ebf2ea0, L_000001ab0ebf6cb0;
L_000001ab0ebf43e0 .arith/sum 6, L_000001ab0ebf3120, L_000001ab0ebf47a0;
L_000001ab0ebf2c20 .part L_000001ab0ebf43e0, 2, 4;
L_000001ab0ebf4ca0 .part L_000001ab0ebf43e0, 0, 2;
L_000001ab0ebf48e0 .concat [ 4 1 0 0], L_000001ab0ebf2c20, L_000001ab0ebf6cf8;
L_000001ab0ebf33a0 .concat [ 2 3 0 0], L_000001ab0ebf4ca0, L_000001ab0ebf6d40;
L_000001ab0ebf4520 .arith/sum 5, L_000001ab0ebf48e0, L_000001ab0ebf33a0;
L_000001ab0ebf34e0 .part L_000001ab0ebf4520, 2, 3;
L_000001ab0ebf4700 .part L_000001ab0ebf34e0, 0, 2;
L_000001ab0ebf4980 .part L_000001ab0ebf4520, 0, 2;
L_000001ab0ebf4a20 .arith/sum 2, L_000001ab0ebf4700, L_000001ab0ebf4980;
L_000001ab0ebf3b20 .concat [ 6 2 0 0], L_000001ab0ebf2d60, L_000001ab0ebf6d88;
L_000001ab0ebf4de0 .concat [ 5 3 0 0], L_000001ab0ebf52e0, L_000001ab0ebf6dd0;
L_000001ab0ebf4840 .arith/sum 8, L_000001ab0ebf3b20, L_000001ab0ebf4de0;
L_000001ab0ebf4b60 .concat [ 4 4 0 0], L_000001ab0ebf2c20, L_000001ab0ebf6e18;
L_000001ab0ebf3800 .arith/sum 8, L_000001ab0ebf4840, L_000001ab0ebf4b60;
L_000001ab0ebf36c0 .concat [ 2 6 0 0], L_000001ab0ebf4700, L_000001ab0ebf6e60;
L_000001ab0ebf4c00 .arith/sum 8, L_000001ab0ebf3800, L_000001ab0ebf36c0;
L_000001ab0ebf31c0 .cmp/eq 2, L_000001ab0ebf4a20, L_000001ab0ebf6ea8;
L_000001ab0ebf4f20 .arith/sum 8, L_000001ab0ebf4c00, L_000001ab0ebf6ef0;
L_000001ab0ebf4fc0 .functor MUXZ 8, L_000001ab0ebf4c00, L_000001ab0ebf4f20, L_000001ab0ebf31c0, C4<>;
L_000001ab0ebf3260 .cmp/eq 2, L_000001ab0ebf4a20, L_000001ab0ebf6f38;
L_000001ab0ebf5240 .functor MUXZ 2, L_000001ab0ebf4a20, L_000001ab0ebf6f80, L_000001ab0ebf3260, C4<>;
S_000001ab0ebebae0 .scope module, "div7_inst" "div_mod_7" 7 58, 9 14 0, S_000001ab0ebeafd0;
 .timescale -9 -12;
    .port_info 0 /INPUT 9 "n";
    .port_info 1 /OUTPUT 9 "quotient";
    .port_info 2 /OUTPUT 3 "remainder";
L_000001ab0ebf7010 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe8c60_0 .net *"_ivl_11", 3 0, L_000001ab0ebf7010;  1 drivers
v000001ab0ebe7b80_0 .net *"_ivl_18", 4 0, L_000001ab0ebf3a80;  1 drivers
L_000001ab0ebf7058 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe8a80_0 .net *"_ivl_21", 0 0, L_000001ab0ebf7058;  1 drivers
v000001ab0ebe8620_0 .net *"_ivl_22", 4 0, L_000001ab0ebf2fe0;  1 drivers
L_000001ab0ebf70a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe86c0_0 .net *"_ivl_25", 1 0, L_000001ab0ebf70a0;  1 drivers
v000001ab0ebe8760_0 .net *"_ivl_32", 2 0, L_000001ab0ebf3c60;  1 drivers
L_000001ab0ebf70e8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebe8800_0 .net *"_ivl_35", 0 0, L_000001ab0ebf70e8;  1 drivers
v000001ab0ebe8940_0 .net *"_ivl_38", 7 0, L_000001ab0ebf3ee0;  1 drivers
v000001ab0ebe8b20_0 .net *"_ivl_4", 6 0, L_000001ab0ebf3940;  1 drivers
L_000001ab0ebf7130 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001ab0ebecec0_0 .net *"_ivl_41", 1 0, L_000001ab0ebf7130;  1 drivers
v000001ab0ebece20_0 .net *"_ivl_42", 7 0, L_000001ab0ebf3f80;  1 drivers
L_000001ab0ebf7178 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebee180_0 .net *"_ivl_45", 3 0, L_000001ab0ebf7178;  1 drivers
v000001ab0ebee360_0 .net *"_ivl_46", 7 0, L_000001ab0ebf4020;  1 drivers
v000001ab0ebed1e0_0 .net *"_ivl_48", 7 0, L_000001ab0ebf4160;  1 drivers
L_000001ab0ebf71c0 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebee400_0 .net *"_ivl_51", 5 0, L_000001ab0ebf71c0;  1 drivers
L_000001ab0ebf7208 .functor BUFT 1, C4<111>, C4<0>, C4<0>, C4<0>;
v000001ab0ebed960_0 .net/2u *"_ivl_54", 2 0, L_000001ab0ebf7208;  1 drivers
v000001ab0ebeeae0_0 .net *"_ivl_56", 0 0, L_000001ab0ebf4200;  1 drivers
v000001ab0ebed000_0 .net *"_ivl_58", 8 0, L_000001ab0ebf63c0;  1 drivers
L_000001ab0ebf7250 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebeed60_0 .net *"_ivl_61", 0 0, L_000001ab0ebf7250;  1 drivers
L_000001ab0ebf7298 .functor BUFT 1, C4<000000001>, C4<0>, C4<0>, C4<0>;
v000001ab0ebed140_0 .net/2u *"_ivl_62", 8 0, L_000001ab0ebf7298;  1 drivers
v000001ab0ebecb00_0 .net *"_ivl_64", 8 0, L_000001ab0ebf5e20;  1 drivers
v000001ab0ebee720_0 .net *"_ivl_66", 8 0, L_000001ab0ebf5920;  1 drivers
L_000001ab0ebf72e0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebedd20_0 .net *"_ivl_69", 0 0, L_000001ab0ebf72e0;  1 drivers
L_000001ab0ebf6fc8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001ab0ebed8c0_0 .net *"_ivl_7", 0 0, L_000001ab0ebf6fc8;  1 drivers
L_000001ab0ebf7328 .functor BUFT 1, C4<111>, C4<0>, C4<0>, C4<0>;
v000001ab0ebee9a0_0 .net/2u *"_ivl_72", 2 0, L_000001ab0ebf7328;  1 drivers
v000001ab0ebed3c0_0 .net *"_ivl_74", 0 0, L_000001ab0ebf56a0;  1 drivers
L_000001ab0ebf7370 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001ab0ebed0a0_0 .net/2u *"_ivl_76", 2 0, L_000001ab0ebf7370;  1 drivers
v000001ab0ebed5a0_0 .net *"_ivl_8", 6 0, L_000001ab0ebf39e0;  1 drivers
v000001ab0ebec880_0 .net "n", 8 0, L_000001ab0ebf61e0;  1 drivers
v000001ab0ebecba0_0 .net "q1", 5 0, L_000001ab0ebf3300;  1 drivers
v000001ab0ebeddc0_0 .net "q2", 3 0, L_000001ab0ebf5380;  1 drivers
v000001ab0ebedc80_0 .net "q3", 1 0, L_000001ab0ebf51a0;  1 drivers
v000001ab0ebee220_0 .net "quotient", 8 0, L_000001ab0ebf5ce0;  alias, 1 drivers
v000001ab0ebecf60_0 .net "quotient_sum", 7 0, L_000001ab0ebf5420;  1 drivers
v000001ab0ebecc40_0 .net "r1", 2 0, L_000001ab0ebf5060;  1 drivers
v000001ab0ebeecc0_0 .net "r2", 2 0, L_000001ab0ebf2f40;  1 drivers
v000001ab0ebeea40_0 .net "r3", 2 0, L_000001ab0ebf3bc0;  1 drivers
v000001ab0ebedaa0_0 .net "rem1", 6 0, L_000001ab0ebf3da0;  1 drivers
v000001ab0ebecce0_0 .net "rem2", 4 0, L_000001ab0ebf5100;  1 drivers
v000001ab0ebed780_0 .net "rem3", 2 0, L_000001ab0ebf3d00;  1 drivers
v000001ab0ebee680_0 .net "remainder", 2 0, L_000001ab0ebf6780;  alias, 1 drivers
L_000001ab0ebf3300 .part L_000001ab0ebf61e0, 3, 6;
L_000001ab0ebf5060 .part L_000001ab0ebf61e0, 0, 3;
L_000001ab0ebf3940 .concat [ 6 1 0 0], L_000001ab0ebf3300, L_000001ab0ebf6fc8;
L_000001ab0ebf39e0 .concat [ 3 4 0 0], L_000001ab0ebf5060, L_000001ab0ebf7010;
L_000001ab0ebf3da0 .arith/sum 7, L_000001ab0ebf3940, L_000001ab0ebf39e0;
L_000001ab0ebf5380 .part L_000001ab0ebf3da0, 3, 4;
L_000001ab0ebf2f40 .part L_000001ab0ebf3da0, 0, 3;
L_000001ab0ebf3a80 .concat [ 4 1 0 0], L_000001ab0ebf5380, L_000001ab0ebf7058;
L_000001ab0ebf2fe0 .concat [ 3 2 0 0], L_000001ab0ebf2f40, L_000001ab0ebf70a0;
L_000001ab0ebf5100 .arith/sum 5, L_000001ab0ebf3a80, L_000001ab0ebf2fe0;
L_000001ab0ebf51a0 .part L_000001ab0ebf5100, 3, 2;
L_000001ab0ebf3bc0 .part L_000001ab0ebf5100, 0, 3;
L_000001ab0ebf3c60 .concat [ 2 1 0 0], L_000001ab0ebf51a0, L_000001ab0ebf70e8;
L_000001ab0ebf3d00 .arith/sum 3, L_000001ab0ebf3c60, L_000001ab0ebf3bc0;
L_000001ab0ebf3ee0 .concat [ 6 2 0 0], L_000001ab0ebf3300, L_000001ab0ebf7130;
L_000001ab0ebf3f80 .concat [ 4 4 0 0], L_000001ab0ebf5380, L_000001ab0ebf7178;
L_000001ab0ebf4020 .arith/sum 8, L_000001ab0ebf3ee0, L_000001ab0ebf3f80;
L_000001ab0ebf4160 .concat [ 2 6 0 0], L_000001ab0ebf51a0, L_000001ab0ebf71c0;
L_000001ab0ebf5420 .arith/sum 8, L_000001ab0ebf4020, L_000001ab0ebf4160;
L_000001ab0ebf4200 .cmp/eq 3, L_000001ab0ebf3d00, L_000001ab0ebf7208;
L_000001ab0ebf63c0 .concat [ 8 1 0 0], L_000001ab0ebf5420, L_000001ab0ebf7250;
L_000001ab0ebf5e20 .arith/sum 9, L_000001ab0ebf63c0, L_000001ab0ebf7298;
L_000001ab0ebf5920 .concat [ 8 1 0 0], L_000001ab0ebf5420, L_000001ab0ebf72e0;
L_000001ab0ebf5ce0 .functor MUXZ 9, L_000001ab0ebf5920, L_000001ab0ebf5e20, L_000001ab0ebf4200, C4<>;
L_000001ab0ebf56a0 .cmp/eq 3, L_000001ab0ebf3d00, L_000001ab0ebf7328;
L_000001ab0ebf6780 .functor MUXZ 3, L_000001ab0ebf3d00, L_000001ab0ebf7370, L_000001ab0ebf56a0, C4<>;
S_000001ab0ebebc70 .scope task, "run_test" "run_test" 2 45, 2 45 0, S_000001ab0eb7be40;
 .timescale -9 -12;
v000001ab0ebf0660_0 .var "test_base0", 1 0;
v000001ab0ebefd00_0 .var "test_base1", 1 0;
v000001ab0ebef800_0 .var "test_base2", 1 0;
v000001ab0ebef120_0 .var "test_k", 31 0;
E_000001ab0eb78770 .event posedge, v000001ab0eb6be20_0;
E_000001ab0eb77e30 .event anyedge, v000001ab0ebeca60_0;
E_000001ab0eb786b0 .event anyedge, v000001ab0ebec7e0_0;
TD_sphere3_fsm_32bit_simple_tb.run_test ;
    %load/vec4 v000001ab0ebef120_0;
    %store/vec4 v000001ab0ebef260_0, 0, 32;
    %load/vec4 v000001ab0ebf0660_0;
    %store/vec4 v000001ab0ebefda0_0, 0, 2;
    %load/vec4 v000001ab0ebefd00_0;
    %store/vec4 v000001ab0ebefe40_0, 0, 2;
    %load/vec4 v000001ab0ebef800_0;
    %store/vec4 v000001ab0ebeff80_0, 0, 2;
    %vpi_call 2 56 "$display", "Starting test: count=%0d, waiting for ready...", v000001ab0ebef120_0 {0 0 0};
T_2.4 ;
    %load/vec4 v000001ab0ebef300_0;
    %pad/u 32;
    %pushi/vec4 1, 0, 32;
    %cmp/e;
    %flag_get/vec4 4;
    %cmpi/ne 1, 0, 1;
    %jmp/0xz T_2.5, 6;
    %wait E_000001ab0eb786b0;
    %jmp T_2.4;
T_2.5 ;
    %vpi_call 2 58 "$display", "  Module is ready, starting computation" {0 0 0};
    %wait E_000001ab0eb78770;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000001ab0ebf4480_0, 0, 1;
    %wait E_000001ab0eb78770;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000001ab0ebf4480_0, 0, 1;
    %vpi_call 2 64 "$display", "  Waiting for done signal..." {0 0 0};
T_2.6 ;
    %load/vec4 v000001ab0ebef1c0_0;
    %pad/u 32;
    %pushi/vec4 1, 0, 32;
    %cmp/e;
    %flag_get/vec4 4;
    %cmpi/ne 1, 0, 1;
    %jmp/0xz T_2.7, 6;
    %wait E_000001ab0eb77e30;
    %jmp T_2.6;
T_2.7 ;
    %wait E_000001ab0eb78770;
    %load/vec4 v000001ab0ebf0660_0;
    %pad/u 32;
    %addi 2, 0, 32;
    %load/vec4 v000001ab0ebefd00_0;
    %pad/u 32;
    %addi 2, 0, 32;
    %load/vec4 v000001ab0ebef800_0;
    %pad/u 32;
    %addi 2, 0, 32;
    %vpi_call 2 69 "$display", "count=%0d, bases=[%0d,%0d,%0d]", v000001ab0ebef120_0, S<2,vec4,u32>, S<1,vec4,u32>, S<0,vec4,u32> {3 0 0};
    %load/vec4 v000001ab0ebf4e80_0;
    %cvt/rv/s;
    %pushi/real 1073741824, 4082; load=65536.0
    %div/wr;
    %vpi_call 2 70 "$display", "  result_x=%h (\342\211\210%0.3f)", v000001ab0ebf4e80_0, W<0,r> {0 1 0};
    %load/vec4 v000001ab0ebf45c0_0;
    %cvt/rv/s;
    %pushi/real 1073741824, 4082; load=65536.0
    %div/wr;
    %vpi_call 2 71 "$display", "  result_y=%h (\342\211\210%0.3f)", v000001ab0ebf45c0_0, W<0,r> {0 1 0};
    %load/vec4 v000001ab0ebf4340_0;
    %cvt/rv/s;
    %pushi/real 1073741824, 4082; load=65536.0
    %div/wr;
    %vpi_call 2 72 "$display", "  result_z=%h (\342\211\210%0.3f)", v000001ab0ebf4340_0, W<0,r> {0 1 0};
    %load/vec4 v000001ab0ebf3080_0;
    %cvt/rv/s;
    %pushi/real 1073741824, 4082; load=65536.0
    %div/wr;
    %vpi_call 2 73 "$display", "  result_w=%h (\342\211\210%0.3f)", v000001ab0ebf3080_0, W<0,r> {0 1 0};
    %delay 50000, 0;
    %end;
S_000001ab0eb7bfd0 .scope module, "sqrt_approx_16_16" "sqrt_approx_16_16" 10 10;
 .timescale -9 -12;
    .port_info 0 /INPUT 32 "x";
    .port_info 1 /OUTPUT 32 "y";
o000001ab0eb8bd38 .functor BUFZ 32, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
v000001ab0ebf4660_0 .net "x", 31 0, o000001ab0eb8bd38;  0 drivers
v000001ab0ebf3620_0 .var "x_div_y0", 47 0;
v000001ab0ebf4d40_0 .var "x_div_y1", 47 0;
v000001ab0ebf2cc0_0 .var "y", 31 0;
v000001ab0ebf3580_0 .var "y0", 31 0;
v000001ab0ebf38a0_0 .var "y1", 31 0;
v000001ab0ebf3440_0 .var "y2", 31 0;
E_000001ab0eb78ab0/0 .event anyedge, v000001ab0ebf4660_0, v000001ab0ebf3580_0, v000001ab0ebf3620_0, v000001ab0ebf38a0_0;
E_000001ab0eb78ab0/1 .event anyedge, v000001ab0ebf4d40_0, v000001ab0ebf3440_0;
E_000001ab0eb78ab0 .event/or E_000001ab0eb78ab0/0, E_000001ab0eb78ab0/1;
    .scope S_000001ab0ebeafd0;
T_3 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebeeea0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.0, 8;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v000001ab0ebed280_0, 0;
    %jmp T_3.1;
T_3.0 ;
    %load/vec4 v000001ab0ebed460_0;
    %assign/vec4 v000001ab0ebed280_0, 0;
T_3.1 ;
    %jmp T_3;
    .thread T_3;
    .scope S_000001ab0ebeafd0;
T_4 ;
    %wait E_000001ab0eb785f0;
    %load/vec4 v000001ab0ebed280_0;
    %store/vec4 v000001ab0ebed460_0, 0, 3;
    %load/vec4 v000001ab0ebed280_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_4.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_4.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_4.2, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_4.3, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_4.4, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_4.5, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 3;
    %cmp/u;
    %jmp/1 T_4.6, 6;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v000001ab0ebed460_0, 0, 3;
    %jmp T_4.8;
T_4.0 ;
    %load/vec4 v000001ab0ebeef40_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_4.9, 8;
    %pushi/vec4 1, 0, 3;
    %store/vec4 v000001ab0ebed460_0, 0, 3;
T_4.9 ;
    %jmp T_4.8;
T_4.1 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v000001ab0ebed460_0, 0, 3;
    %jmp T_4.8;
T_4.2 ;
    %pushi/vec4 3, 0, 3;
    %store/vec4 v000001ab0ebed460_0, 0, 3;
    %jmp T_4.8;
T_4.3 ;
    %pushi/vec4 4, 0, 3;
    %store/vec4 v000001ab0ebed460_0, 0, 3;
    %jmp T_4.8;
T_4.4 ;
    %pushi/vec4 5, 0, 3;
    %store/vec4 v000001ab0ebed460_0, 0, 3;
    %jmp T_4.8;
T_4.5 ;
    %load/vec4 v000001ab0ebec920_0;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_4.11, 4;
    %pushi/vec4 6, 0, 3;
    %store/vec4 v000001ab0ebed460_0, 0, 3;
    %jmp T_4.12;
T_4.11 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v000001ab0ebed460_0, 0, 3;
T_4.12 ;
    %jmp T_4.8;
T_4.6 ;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v000001ab0ebed460_0, 0, 3;
    %jmp T_4.8;
T_4.8 ;
    %pop/vec4 1;
    %jmp T_4;
    .thread T_4, $push;
    .scope S_000001ab0ebeafd0;
T_5 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebeeea0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_5.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebec920_0, 0;
    %pushi/vec4 65536, 0, 32;
    %assign/vec4 v000001ab0ebed820_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebee040_0, 0;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001ab0ebee2c0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebed500_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebede60_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebee4a0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebee900_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebeda00_0, 0;
    %jmp T_5.1;
T_5.0 ;
    %load/vec4 v000001ab0ebed280_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_5.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_5.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_5.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_5.5, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_5.6, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_5.7, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 3;
    %cmp/u;
    %jmp/1 T_5.8, 6;
    %jmp T_5.9;
T_5.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebeda00_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebee900_0, 0;
    %load/vec4 v000001ab0ebeef40_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_5.10, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebeda00_0, 0;
    %load/vec4 v000001ab0ebeee00_0;
    %assign/vec4 v000001ab0ebec920_0, 0;
T_5.10 ;
    %jmp T_5.9;
T_5.3 ;
    %load/vec4 v000001ab0ebed640_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_5.12, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_5.13, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_5.14, 6;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001ab0ebee2c0_0, 0;
    %pushi/vec4 32768, 0, 32;
    %assign/vec4 v000001ab0ebed820_0, 0;
    %jmp T_5.16;
T_5.12 ;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001ab0ebee2c0_0, 0;
    %pushi/vec4 32768, 0, 32;
    %assign/vec4 v000001ab0ebed820_0, 0;
    %jmp T_5.16;
T_5.13 ;
    %pushi/vec4 3, 0, 32;
    %assign/vec4 v000001ab0ebee2c0_0, 0;
    %pushi/vec4 21845, 0, 32;
    %assign/vec4 v000001ab0ebed820_0, 0;
    %jmp T_5.16;
T_5.14 ;
    %pushi/vec4 7, 0, 32;
    %assign/vec4 v000001ab0ebee2c0_0, 0;
    %pushi/vec4 9362, 0, 32;
    %assign/vec4 v000001ab0ebed820_0, 0;
    %jmp T_5.16;
T_5.16 ;
    %pop/vec4 1;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebee040_0, 0;
    %jmp T_5.9;
T_5.4 ;
    %load/vec4 v000001ab0ebee2c0_0;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_5.17, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 32;
    %cmp/u;
    %jmp/1 T_5.18, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 32;
    %cmp/u;
    %jmp/1 T_5.19, 6;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebede60_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebed500_0, 0;
    %jmp T_5.21;
T_5.17 ;
    %load/vec4 v000001ab0ebec920_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebede60_0, 0;
    %load/vec4 v000001ab0ebec920_0;
    %parti/s 1, 0, 2;
    %pad/u 32;
    %assign/vec4 v000001ab0ebed500_0, 0;
    %jmp T_5.21;
T_5.18 ;
    %pushi/vec4 0, 0, 24;
    %load/vec4 v000001ab0ebee0e0_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebede60_0, 0;
    %pushi/vec4 0, 0, 30;
    %load/vec4 v000001ab0ebed6e0_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebed500_0, 0;
    %jmp T_5.21;
T_5.19 ;
    %pushi/vec4 0, 0, 23;
    %load/vec4 v000001ab0ebecd80_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebede60_0, 0;
    %pushi/vec4 0, 0, 29;
    %load/vec4 v000001ab0ebed320_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebed500_0, 0;
    %jmp T_5.21;
T_5.21 ;
    %pop/vec4 1;
    %jmp T_5.9;
T_5.5 ;
    %load/vec4 v000001ab0ebed500_0;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_5.22, 4;
    %load/vec4 v000001ab0ebee040_0;
    %load/vec4 v000001ab0ebed500_0;
    %load/vec4 v000001ab0ebed820_0;
    %mul;
    %add;
    %assign/vec4 v000001ab0ebee040_0, 0;
T_5.22 ;
    %jmp T_5.9;
T_5.6 ;
    %load/vec4 v000001ab0ebede60_0;
    %assign/vec4 v000001ab0ebec920_0, 0;
    %load/vec4 v000001ab0ebee2c0_0;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_5.24, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 32;
    %cmp/u;
    %jmp/1 T_5.25, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 32;
    %cmp/u;
    %jmp/1 T_5.26, 6;
    %jmp T_5.27;
T_5.24 ;
    %load/vec4 v000001ab0ebed820_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebed820_0, 0;
    %jmp T_5.27;
T_5.25 ;
    %load/vec4 v000001ab0ebed820_0;
    %muli 21845, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebed820_0, 0;
    %jmp T_5.27;
T_5.26 ;
    %load/vec4 v000001ab0ebed820_0;
    %muli 9362, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebed820_0, 0;
    %jmp T_5.27;
T_5.27 ;
    %pop/vec4 1;
    %jmp T_5.9;
T_5.7 ;
    %jmp T_5.9;
T_5.8 ;
    %load/vec4 v000001ab0ebee040_0;
    %assign/vec4 v000001ab0ebee4a0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebee900_0, 0;
    %jmp T_5.9;
T_5.9 ;
    %pop/vec4 1;
T_5.1 ;
    %jmp T_5;
    .thread T_5;
    .scope S_000001ab0ebe02c0;
T_6 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebe47d0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_6.0, 8;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v000001ab0ebe4410_0, 0;
    %jmp T_6.1;
T_6.0 ;
    %load/vec4 v000001ab0ebe40f0_0;
    %assign/vec4 v000001ab0ebe4410_0, 0;
T_6.1 ;
    %jmp T_6;
    .thread T_6;
    .scope S_000001ab0ebe02c0;
T_7 ;
    %wait E_000001ab0eb784f0;
    %load/vec4 v000001ab0ebe4410_0;
    %store/vec4 v000001ab0ebe40f0_0, 0, 3;
    %load/vec4 v000001ab0ebe4410_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_7.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_7.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_7.2, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_7.3, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_7.4, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_7.5, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 3;
    %cmp/u;
    %jmp/1 T_7.6, 6;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v000001ab0ebe40f0_0, 0, 3;
    %jmp T_7.8;
T_7.0 ;
    %load/vec4 v000001ab0ebe3d30_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.9, 8;
    %pushi/vec4 1, 0, 3;
    %store/vec4 v000001ab0ebe40f0_0, 0, 3;
T_7.9 ;
    %jmp T_7.8;
T_7.1 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v000001ab0ebe40f0_0, 0, 3;
    %jmp T_7.8;
T_7.2 ;
    %pushi/vec4 3, 0, 3;
    %store/vec4 v000001ab0ebe40f0_0, 0, 3;
    %jmp T_7.8;
T_7.3 ;
    %pushi/vec4 4, 0, 3;
    %store/vec4 v000001ab0ebe40f0_0, 0, 3;
    %jmp T_7.8;
T_7.4 ;
    %pushi/vec4 5, 0, 3;
    %store/vec4 v000001ab0ebe40f0_0, 0, 3;
    %jmp T_7.8;
T_7.5 ;
    %load/vec4 v000001ab0ebe38d0_0;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_7.11, 4;
    %pushi/vec4 6, 0, 3;
    %store/vec4 v000001ab0ebe40f0_0, 0, 3;
    %jmp T_7.12;
T_7.11 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v000001ab0ebe40f0_0, 0, 3;
T_7.12 ;
    %jmp T_7.8;
T_7.6 ;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v000001ab0ebe40f0_0, 0, 3;
    %jmp T_7.8;
T_7.8 ;
    %pop/vec4 1;
    %jmp T_7;
    .thread T_7, $push;
    .scope S_000001ab0ebe02c0;
T_8 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebe47d0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_8.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe38d0_0, 0;
    %pushi/vec4 65536, 0, 32;
    %assign/vec4 v000001ab0ebe3970_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe3ab0_0, 0;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001ab0ebe3fb0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe3c90_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe3bf0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe44b0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe3510_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe4230_0, 0;
    %jmp T_8.1;
T_8.0 ;
    %load/vec4 v000001ab0ebe4410_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_8.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_8.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_8.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_8.5, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_8.6, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_8.7, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 3;
    %cmp/u;
    %jmp/1 T_8.8, 6;
    %jmp T_8.9;
T_8.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe4230_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe3510_0, 0;
    %load/vec4 v000001ab0ebe3d30_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_8.10, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe4230_0, 0;
    %load/vec4 v000001ab0ebe4af0_0;
    %assign/vec4 v000001ab0ebe38d0_0, 0;
T_8.10 ;
    %jmp T_8.9;
T_8.3 ;
    %load/vec4 v000001ab0ebe3790_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_8.12, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_8.13, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_8.14, 6;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001ab0ebe3fb0_0, 0;
    %pushi/vec4 32768, 0, 32;
    %assign/vec4 v000001ab0ebe3970_0, 0;
    %jmp T_8.16;
T_8.12 ;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001ab0ebe3fb0_0, 0;
    %pushi/vec4 32768, 0, 32;
    %assign/vec4 v000001ab0ebe3970_0, 0;
    %jmp T_8.16;
T_8.13 ;
    %pushi/vec4 3, 0, 32;
    %assign/vec4 v000001ab0ebe3fb0_0, 0;
    %pushi/vec4 21845, 0, 32;
    %assign/vec4 v000001ab0ebe3970_0, 0;
    %jmp T_8.16;
T_8.14 ;
    %pushi/vec4 7, 0, 32;
    %assign/vec4 v000001ab0ebe3fb0_0, 0;
    %pushi/vec4 9362, 0, 32;
    %assign/vec4 v000001ab0ebe3970_0, 0;
    %jmp T_8.16;
T_8.16 ;
    %pop/vec4 1;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe3ab0_0, 0;
    %jmp T_8.9;
T_8.4 ;
    %load/vec4 v000001ab0ebe3fb0_0;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_8.17, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 32;
    %cmp/u;
    %jmp/1 T_8.18, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 32;
    %cmp/u;
    %jmp/1 T_8.19, 6;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe3bf0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe3c90_0, 0;
    %jmp T_8.21;
T_8.17 ;
    %load/vec4 v000001ab0ebe38d0_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebe3bf0_0, 0;
    %load/vec4 v000001ab0ebe38d0_0;
    %parti/s 1, 0, 2;
    %pad/u 32;
    %assign/vec4 v000001ab0ebe3c90_0, 0;
    %jmp T_8.21;
T_8.18 ;
    %pushi/vec4 0, 0, 24;
    %load/vec4 v000001ab0ebe45f0_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebe3bf0_0, 0;
    %pushi/vec4 0, 0, 30;
    %load/vec4 v000001ab0ebe4690_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebe3c90_0, 0;
    %jmp T_8.21;
T_8.19 ;
    %pushi/vec4 0, 0, 23;
    %load/vec4 v000001ab0ebe31f0_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebe3bf0_0, 0;
    %pushi/vec4 0, 0, 29;
    %load/vec4 v000001ab0ebe4870_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebe3c90_0, 0;
    %jmp T_8.21;
T_8.21 ;
    %pop/vec4 1;
    %jmp T_8.9;
T_8.5 ;
    %load/vec4 v000001ab0ebe3c90_0;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_8.22, 4;
    %load/vec4 v000001ab0ebe3ab0_0;
    %load/vec4 v000001ab0ebe3c90_0;
    %load/vec4 v000001ab0ebe3970_0;
    %mul;
    %add;
    %assign/vec4 v000001ab0ebe3ab0_0, 0;
T_8.22 ;
    %jmp T_8.9;
T_8.6 ;
    %load/vec4 v000001ab0ebe3bf0_0;
    %assign/vec4 v000001ab0ebe38d0_0, 0;
    %load/vec4 v000001ab0ebe3fb0_0;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_8.24, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 32;
    %cmp/u;
    %jmp/1 T_8.25, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 32;
    %cmp/u;
    %jmp/1 T_8.26, 6;
    %jmp T_8.27;
T_8.24 ;
    %load/vec4 v000001ab0ebe3970_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebe3970_0, 0;
    %jmp T_8.27;
T_8.25 ;
    %load/vec4 v000001ab0ebe3970_0;
    %muli 21845, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebe3970_0, 0;
    %jmp T_8.27;
T_8.26 ;
    %load/vec4 v000001ab0ebe3970_0;
    %muli 9362, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebe3970_0, 0;
    %jmp T_8.27;
T_8.27 ;
    %pop/vec4 1;
    %jmp T_8.9;
T_8.7 ;
    %jmp T_8.9;
T_8.8 ;
    %load/vec4 v000001ab0ebe3ab0_0;
    %assign/vec4 v000001ab0ebe44b0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe3510_0, 0;
    %jmp T_8.9;
T_8.9 ;
    %pop/vec4 1;
T_8.1 ;
    %jmp T_8;
    .thread T_8;
    .scope S_000001ab0eab7d70;
T_9 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebdf020_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_9.0, 8;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v000001ab0ebdd790_0, 0;
    %jmp T_9.1;
T_9.0 ;
    %load/vec4 v000001ab0ebdf520_0;
    %assign/vec4 v000001ab0ebdd790_0, 0;
T_9.1 ;
    %jmp T_9;
    .thread T_9;
    .scope S_000001ab0eab7d70;
T_10 ;
    %wait E_000001ab0eb78270;
    %load/vec4 v000001ab0ebdd790_0;
    %store/vec4 v000001ab0ebdf520_0, 0, 3;
    %load/vec4 v000001ab0ebdd790_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_10.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_10.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_10.2, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_10.3, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_10.4, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_10.5, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 3;
    %cmp/u;
    %jmp/1 T_10.6, 6;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v000001ab0ebdf520_0, 0, 3;
    %jmp T_10.8;
T_10.0 ;
    %load/vec4 v000001ab0ebdebc0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_10.9, 8;
    %pushi/vec4 1, 0, 3;
    %store/vec4 v000001ab0ebdf520_0, 0, 3;
T_10.9 ;
    %jmp T_10.8;
T_10.1 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v000001ab0ebdf520_0, 0, 3;
    %jmp T_10.8;
T_10.2 ;
    %pushi/vec4 3, 0, 3;
    %store/vec4 v000001ab0ebdf520_0, 0, 3;
    %jmp T_10.8;
T_10.3 ;
    %pushi/vec4 4, 0, 3;
    %store/vec4 v000001ab0ebdf520_0, 0, 3;
    %jmp T_10.8;
T_10.4 ;
    %pushi/vec4 5, 0, 3;
    %store/vec4 v000001ab0ebdf520_0, 0, 3;
    %jmp T_10.8;
T_10.5 ;
    %load/vec4 v000001ab0ebe0060_0;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_10.11, 4;
    %pushi/vec4 6, 0, 3;
    %store/vec4 v000001ab0ebdf520_0, 0, 3;
    %jmp T_10.12;
T_10.11 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v000001ab0ebdf520_0, 0, 3;
T_10.12 ;
    %jmp T_10.8;
T_10.6 ;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v000001ab0ebdf520_0, 0, 3;
    %jmp T_10.8;
T_10.8 ;
    %pop/vec4 1;
    %jmp T_10;
    .thread T_10, $push;
    .scope S_000001ab0eab7d70;
T_11 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebdf020_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_11.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe0060_0, 0;
    %pushi/vec4 65536, 0, 32;
    %assign/vec4 v000001ab0ebdeda0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebddfb0_0, 0;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001ab0ebdda10_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebde8a0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebde800_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebdfac0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebddab0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebdef80_0, 0;
    %jmp T_11.1;
T_11.0 ;
    %load/vec4 v000001ab0ebdd790_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_11.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_11.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_11.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_11.5, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_11.6, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_11.7, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 3;
    %cmp/u;
    %jmp/1 T_11.8, 6;
    %jmp T_11.9;
T_11.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebdef80_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebddab0_0, 0;
    %load/vec4 v000001ab0ebdebc0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_11.10, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebdef80_0, 0;
    %load/vec4 v000001ab0ebdfc00_0;
    %assign/vec4 v000001ab0ebe0060_0, 0;
T_11.10 ;
    %jmp T_11.9;
T_11.3 ;
    %load/vec4 v000001ab0ebdc570_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_11.12, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_11.13, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_11.14, 6;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001ab0ebdda10_0, 0;
    %pushi/vec4 32768, 0, 32;
    %assign/vec4 v000001ab0ebdeda0_0, 0;
    %jmp T_11.16;
T_11.12 ;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001ab0ebdda10_0, 0;
    %pushi/vec4 32768, 0, 32;
    %assign/vec4 v000001ab0ebdeda0_0, 0;
    %jmp T_11.16;
T_11.13 ;
    %pushi/vec4 3, 0, 32;
    %assign/vec4 v000001ab0ebdda10_0, 0;
    %pushi/vec4 21845, 0, 32;
    %assign/vec4 v000001ab0ebdeda0_0, 0;
    %jmp T_11.16;
T_11.14 ;
    %pushi/vec4 7, 0, 32;
    %assign/vec4 v000001ab0ebdda10_0, 0;
    %pushi/vec4 9362, 0, 32;
    %assign/vec4 v000001ab0ebdeda0_0, 0;
    %jmp T_11.16;
T_11.16 ;
    %pop/vec4 1;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebddfb0_0, 0;
    %jmp T_11.9;
T_11.4 ;
    %load/vec4 v000001ab0ebdda10_0;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_11.17, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 32;
    %cmp/u;
    %jmp/1 T_11.18, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 32;
    %cmp/u;
    %jmp/1 T_11.19, 6;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebde800_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebde8a0_0, 0;
    %jmp T_11.21;
T_11.17 ;
    %load/vec4 v000001ab0ebe0060_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebde800_0, 0;
    %load/vec4 v000001ab0ebe0060_0;
    %parti/s 1, 0, 2;
    %pad/u 32;
    %assign/vec4 v000001ab0ebde8a0_0, 0;
    %jmp T_11.21;
T_11.18 ;
    %pushi/vec4 0, 0, 24;
    %load/vec4 v000001ab0ebdd830_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebde800_0, 0;
    %pushi/vec4 0, 0, 30;
    %load/vec4 v000001ab0ebdc4d0_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebde8a0_0, 0;
    %jmp T_11.21;
T_11.19 ;
    %pushi/vec4 0, 0, 23;
    %load/vec4 v000001ab0ebdc610_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebde800_0, 0;
    %pushi/vec4 0, 0, 29;
    %load/vec4 v000001ab0ebdd8d0_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001ab0ebde8a0_0, 0;
    %jmp T_11.21;
T_11.21 ;
    %pop/vec4 1;
    %jmp T_11.9;
T_11.5 ;
    %load/vec4 v000001ab0ebde8a0_0;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_11.22, 4;
    %load/vec4 v000001ab0ebddfb0_0;
    %load/vec4 v000001ab0ebde8a0_0;
    %load/vec4 v000001ab0ebdeda0_0;
    %mul;
    %add;
    %assign/vec4 v000001ab0ebddfb0_0, 0;
T_11.22 ;
    %jmp T_11.9;
T_11.6 ;
    %load/vec4 v000001ab0ebde800_0;
    %assign/vec4 v000001ab0ebe0060_0, 0;
    %load/vec4 v000001ab0ebdda10_0;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_11.24, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 32;
    %cmp/u;
    %jmp/1 T_11.25, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 32;
    %cmp/u;
    %jmp/1 T_11.26, 6;
    %jmp T_11.27;
T_11.24 ;
    %load/vec4 v000001ab0ebdeda0_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebdeda0_0, 0;
    %jmp T_11.27;
T_11.25 ;
    %load/vec4 v000001ab0ebdeda0_0;
    %muli 21845, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebdeda0_0, 0;
    %jmp T_11.27;
T_11.26 ;
    %load/vec4 v000001ab0ebdeda0_0;
    %muli 9362, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebdeda0_0, 0;
    %jmp T_11.27;
T_11.27 ;
    %pop/vec4 1;
    %jmp T_11.9;
T_11.7 ;
    %jmp T_11.9;
T_11.8 ;
    %load/vec4 v000001ab0ebddfb0_0;
    %assign/vec4 v000001ab0ebdfac0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebddab0_0, 0;
    %jmp T_11.9;
T_11.9 ;
    %pop/vec4 1;
T_11.1 ;
    %jmp T_11;
    .thread T_11;
    .scope S_000001ab0eab7be0;
T_12 ;
    %pushi/vec4 8192, 0, 16;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 4836, 0, 16;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 2555, 0, 16;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 1297, 0, 16;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 651, 0, 16;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 326, 0, 16;
    %ix/load 4, 5, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 163, 0, 16;
    %ix/load 4, 6, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 81, 0, 16;
    %ix/load 4, 7, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 41, 0, 16;
    %ix/load 4, 8, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 20, 0, 16;
    %ix/load 4, 9, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 10, 0, 16;
    %ix/load 4, 10, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 5, 0, 16;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 3, 0, 16;
    %ix/load 4, 12, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 1, 0, 16;
    %ix/load 4, 13, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 1, 0, 16;
    %ix/load 4, 14, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %pushi/vec4 0, 0, 16;
    %ix/load 4, 15, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0eb6c1e0, 4, 0;
    %end;
    .thread T_12;
    .scope S_000001ab0eab7be0;
T_13 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0eb6dc20_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_13.0, 8;
    %pushi/vec4 0, 0, 2;
    %assign/vec4 v000001ab0eb6d400_0, 0;
    %jmp T_13.1;
T_13.0 ;
    %load/vec4 v000001ab0eb6ca00_0;
    %assign/vec4 v000001ab0eb6d400_0, 0;
T_13.1 ;
    %jmp T_13;
    .thread T_13;
    .scope S_000001ab0eab7be0;
T_14 ;
    %wait E_000001ab0eb789b0;
    %load/vec4 v000001ab0eb6d400_0;
    %store/vec4 v000001ab0eb6ca00_0, 0, 2;
    %load/vec4 v000001ab0eb6d400_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_14.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_14.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_14.2, 6;
    %jmp T_14.3;
T_14.0 ;
    %load/vec4 v000001ab0eb6c280_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_14.4, 8;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001ab0eb6ca00_0, 0, 2;
T_14.4 ;
    %jmp T_14.3;
T_14.1 ;
    %load/vec4 v000001ab0eb6db80_0;
    %pad/u 32;
    %cmpi/e 15, 0, 32;
    %jmp/0xz  T_14.6, 4;
    %pushi/vec4 2, 0, 2;
    %store/vec4 v000001ab0eb6ca00_0, 0, 2;
T_14.6 ;
    %jmp T_14.3;
T_14.2 ;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001ab0eb6ca00_0, 0, 2;
    %jmp T_14.3;
T_14.3 ;
    %pop/vec4 1;
    %jmp T_14;
    .thread T_14, $push;
    .scope S_000001ab0eab7be0;
T_15 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0eb6dc20_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_15.0, 8;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0eb6cfa0_0, 0;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0eb6d7c0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000001ab0eb6d900_0, 0;
    %pushi/vec4 0, 0, 4;
    %assign/vec4 v000001ab0eb6db80_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0eb6c8c0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0eb6d360_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0eb6d860_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0eb6cc80_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000001ab0eb6d5e0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0eb6d720_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0eb6d4a0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0eb6da40_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0eb6d680_0, 0;
    %jmp T_15.1;
T_15.0 ;
    %load/vec4 v000001ab0eb6d400_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_15.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_15.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_15.4, 6;
    %jmp T_15.5;
T_15.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0eb6cc80_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0eb6d860_0, 0;
    %load/vec4 v000001ab0eb6c280_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_15.6, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0eb6cc80_0, 0;
    %load/vec4 v000001ab0eb6c780_0;
    %assign/vec4 v000001ab0eb6d2c0_0, 0;
    %load/vec4 v000001ab0eb6c780_0;
    %pad/u 32;
    %cmpi/u 16384, 0, 32;
    %jmp/0xz  T_15.8, 5;
    %load/vec4 v000001ab0eb6c780_0;
    %store/vec4 v000001ab0eb6d5e0_0, 0, 16;
    %pushi/vec4 39797, 0, 17;
    %assign/vec4 v000001ab0eb6cfa0_0, 0;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0eb6d7c0_0, 0;
    %jmp T_15.9;
T_15.8 ;
    %load/vec4 v000001ab0eb6c780_0;
    %pad/u 32;
    %cmpi/u 32768, 0, 32;
    %jmp/0xz  T_15.10, 5;
    %load/vec4 v000001ab0eb6c780_0;
    %subi 16384, 0, 16;
    %store/vec4 v000001ab0eb6d5e0_0, 0, 16;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0eb6cfa0_0, 0;
    %pushi/vec4 39797, 0, 17;
    %assign/vec4 v000001ab0eb6d7c0_0, 0;
    %jmp T_15.11;
T_15.10 ;
    %load/vec4 v000001ab0eb6c780_0;
    %pad/u 32;
    %cmpi/u 49152, 0, 32;
    %jmp/0xz  T_15.12, 5;
    %load/vec4 v000001ab0eb6c780_0;
    %subi 32768, 0, 16;
    %store/vec4 v000001ab0eb6d5e0_0, 0, 16;
    %pushi/vec4 91275, 0, 17;
    %assign/vec4 v000001ab0eb6cfa0_0, 0;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0eb6d7c0_0, 0;
    %jmp T_15.13;
T_15.12 ;
    %load/vec4 v000001ab0eb6c780_0;
    %subi 49152, 0, 16;
    %store/vec4 v000001ab0eb6d5e0_0, 0, 16;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0eb6cfa0_0, 0;
    %pushi/vec4 91275, 0, 17;
    %assign/vec4 v000001ab0eb6d7c0_0, 0;
T_15.13 ;
T_15.11 ;
T_15.9 ;
    %load/vec4 v000001ab0eb6d5e0_0;
    %assign/vec4 v000001ab0eb6d900_0, 0;
    %pushi/vec4 0, 0, 4;
    %assign/vec4 v000001ab0eb6db80_0, 0;
T_15.6 ;
    %jmp T_15.5;
T_15.3 ;
    %load/vec4 v000001ab0eb6d900_0;
    %parti/s 1, 15, 5;
    %flag_set/vec4 8;
    %jmp/0xz  T_15.14, 8;
    %load/vec4 v000001ab0eb6cfa0_0;
    %load/vec4 v000001ab0eb6d7c0_0;
    %ix/getv 4, v000001ab0eb6db80_0;
    %shiftr 4;
    %add;
    %assign/vec4 v000001ab0eb6cfa0_0, 0;
    %load/vec4 v000001ab0eb6d7c0_0;
    %load/vec4 v000001ab0eb6cfa0_0;
    %ix/getv 4, v000001ab0eb6db80_0;
    %shiftr 4;
    %sub;
    %assign/vec4 v000001ab0eb6d7c0_0, 0;
    %load/vec4 v000001ab0eb6d900_0;
    %load/vec4 v000001ab0eb6db80_0;
    %pad/u 6;
    %ix/vec4 4;
    %load/vec4a v000001ab0eb6c1e0, 4;
    %add;
    %assign/vec4 v000001ab0eb6d900_0, 0;
    %jmp T_15.15;
T_15.14 ;
    %load/vec4 v000001ab0eb6cfa0_0;
    %load/vec4 v000001ab0eb6d7c0_0;
    %ix/getv 4, v000001ab0eb6db80_0;
    %shiftr 4;
    %sub;
    %assign/vec4 v000001ab0eb6cfa0_0, 0;
    %load/vec4 v000001ab0eb6d7c0_0;
    %load/vec4 v000001ab0eb6cfa0_0;
    %ix/getv 4, v000001ab0eb6db80_0;
    %shiftr 4;
    %add;
    %assign/vec4 v000001ab0eb6d7c0_0, 0;
    %load/vec4 v000001ab0eb6d900_0;
    %load/vec4 v000001ab0eb6db80_0;
    %pad/u 6;
    %ix/vec4 4;
    %load/vec4a v000001ab0eb6c1e0, 4;
    %sub;
    %assign/vec4 v000001ab0eb6d900_0, 0;
T_15.15 ;
    %load/vec4 v000001ab0eb6db80_0;
    %addi 1, 0, 4;
    %assign/vec4 v000001ab0eb6db80_0, 0;
    %jmp T_15.5;
T_15.4 ;
    %load/vec4 v000001ab0eb6cfa0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %load/vec4 v000001ab0eb6cfa0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v000001ab0eb6cfa0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v000001ab0eb6cfa0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 6, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %store/vec4 v000001ab0eb6d720_0, 0, 32;
    %load/vec4 v000001ab0eb6d7c0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %load/vec4 v000001ab0eb6d7c0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v000001ab0eb6d7c0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v000001ab0eb6d7c0_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 6, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %store/vec4 v000001ab0eb6d4a0_0, 0, 32;
    %load/vec4 v000001ab0eb6d2c0_0;
    %pad/u 32;
    %cmpi/u 16384, 0, 32;
    %jmp/0xz  T_15.16, 5;
    %load/vec4 v000001ab0eb6d720_0;
    %store/vec4 v000001ab0eb6da40_0, 0, 32;
    %load/vec4 v000001ab0eb6d4a0_0;
    %store/vec4 v000001ab0eb6d680_0, 0, 32;
    %jmp T_15.17;
T_15.16 ;
    %load/vec4 v000001ab0eb6d2c0_0;
    %pad/u 32;
    %cmpi/u 32768, 0, 32;
    %jmp/0xz  T_15.18, 5;
    %load/vec4 v000001ab0eb6d4a0_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v000001ab0eb6da40_0, 0, 32;
    %load/vec4 v000001ab0eb6d720_0;
    %store/vec4 v000001ab0eb6d680_0, 0, 32;
    %jmp T_15.19;
T_15.18 ;
    %load/vec4 v000001ab0eb6d2c0_0;
    %pad/u 32;
    %cmpi/u 49152, 0, 32;
    %jmp/0xz  T_15.20, 5;
    %load/vec4 v000001ab0eb6d720_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v000001ab0eb6da40_0, 0, 32;
    %load/vec4 v000001ab0eb6d4a0_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v000001ab0eb6d680_0, 0, 32;
    %jmp T_15.21;
T_15.20 ;
    %load/vec4 v000001ab0eb6d4a0_0;
    %store/vec4 v000001ab0eb6da40_0, 0, 32;
    %load/vec4 v000001ab0eb6d720_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v000001ab0eb6d680_0, 0, 32;
T_15.21 ;
T_15.19 ;
T_15.17 ;
    %load/vec4 v000001ab0eb6da40_0;
    %assign/vec4 v000001ab0eb6c8c0_0, 0;
    %load/vec4 v000001ab0eb6d680_0;
    %assign/vec4 v000001ab0eb6d360_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0eb6d860_0, 0;
    %jmp T_15.5;
T_15.5 ;
    %pop/vec4 1;
T_15.1 ;
    %jmp T_15;
    .thread T_15;
    .scope S_000001ab0ea46d90;
T_16 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebdf200_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_16.0, 8;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v000001ab0ebdf840_0, 0;
    %jmp T_16.1;
T_16.0 ;
    %load/vec4 v000001ab0ebdfe80_0;
    %assign/vec4 v000001ab0ebdf840_0, 0;
T_16.1 ;
    %jmp T_16;
    .thread T_16;
    .scope S_000001ab0ea46d90;
T_17 ;
    %wait E_000001ab0eb78670;
    %load/vec4 v000001ab0ebdf840_0;
    %store/vec4 v000001ab0ebdfe80_0, 0, 3;
    %load/vec4 v000001ab0ebdf840_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_17.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_17.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_17.2, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_17.3, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_17.4, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_17.5, 6;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v000001ab0ebdfe80_0, 0, 3;
    %jmp T_17.7;
T_17.0 ;
    %load/vec4 v000001ab0ebde9e0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_17.8, 8;
    %pushi/vec4 1, 0, 3;
    %store/vec4 v000001ab0ebdfe80_0, 0, 3;
T_17.8 ;
    %jmp T_17.7;
T_17.1 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v000001ab0ebdfe80_0, 0, 3;
    %jmp T_17.7;
T_17.2 ;
    %load/vec4 v000001ab0ebdea80_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_17.10, 8;
    %pushi/vec4 3, 0, 3;
    %store/vec4 v000001ab0ebdfe80_0, 0, 3;
T_17.10 ;
    %jmp T_17.7;
T_17.3 ;
    %pushi/vec4 4, 0, 3;
    %store/vec4 v000001ab0ebdfe80_0, 0, 3;
    %jmp T_17.7;
T_17.4 ;
    %load/vec4 v000001ab0ebde6c0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_17.12, 8;
    %pushi/vec4 5, 0, 3;
    %store/vec4 v000001ab0ebdfe80_0, 0, 3;
T_17.12 ;
    %jmp T_17.7;
T_17.5 ;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v000001ab0ebdfe80_0, 0, 3;
    %jmp T_17.7;
T_17.7 ;
    %pop/vec4 1;
    %jmp T_17;
    .thread T_17, $push;
    .scope S_000001ab0ea46d90;
T_18 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebdf200_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_18.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebdf0c0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebdf5c0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebdec60_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebdf700_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000001ab0ebdfd40_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebdfca0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebdf980_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebdffc0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebde940_0, 0;
    %jmp T_18.1;
T_18.0 ;
    %load/vec4 v000001ab0ebdf840_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_18.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_18.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_18.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_18.5, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_18.6, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_18.7, 6;
    %jmp T_18.8;
T_18.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebde940_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebdffc0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebdf5c0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebdec60_0, 0;
    %load/vec4 v000001ab0ebde9e0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_18.9, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebde940_0, 0;
    %load/vec4 v000001ab0ebdf8e0_0;
    %assign/vec4 v000001ab0ebdf0c0_0, 0;
T_18.9 ;
    %jmp T_18.8;
T_18.3 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebdf5c0_0, 0;
    %jmp T_18.8;
T_18.4 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebdf5c0_0, 0;
    %load/vec4 v000001ab0ebdea80_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_18.11, 8;
    %load/vec4 v000001ab0ebde760_0;
    %muli 411775, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebdf700_0, 0;
    %load/vec4 v000001ab0ebdf700_0;
    %parti/s 16, 16, 6;
    %assign/vec4 v000001ab0ebdfd40_0, 0;
T_18.11 ;
    %jmp T_18.8;
T_18.5 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebdec60_0, 0;
    %jmp T_18.8;
T_18.6 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebdec60_0, 0;
    %jmp T_18.8;
T_18.7 ;
    %load/vec4 v000001ab0ebde620_0;
    %assign/vec4 v000001ab0ebdfca0_0, 0;
    %load/vec4 v000001ab0ebdf160_0;
    %assign/vec4 v000001ab0ebdf980_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebdffc0_0, 0;
    %jmp T_18.8;
T_18.8 ;
    %pop/vec4 1;
T_18.1 ;
    %jmp T_18;
    .thread T_18;
    .scope S_000001ab0ea07510;
T_19 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebe57e0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_19.0, 8;
    %pushi/vec4 0, 0, 4;
    %assign/vec4 v000001ab0ebe75e0_0, 0;
    %jmp T_19.1;
T_19.0 ;
    %load/vec4 v000001ab0ebe6b40_0;
    %assign/vec4 v000001ab0ebe75e0_0, 0;
T_19.1 ;
    %jmp T_19;
    .thread T_19;
    .scope S_000001ab0ea07510;
T_20 ;
    %wait E_000001ab0eb78af0;
    %load/vec4 v000001ab0ebe75e0_0;
    %store/vec4 v000001ab0ebe6b40_0, 0, 4;
    %load/vec4 v000001ab0ebe75e0_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 4;
    %cmp/u;
    %jmp/1 T_20.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 4;
    %cmp/u;
    %jmp/1 T_20.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 4;
    %cmp/u;
    %jmp/1 T_20.2, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 4;
    %cmp/u;
    %jmp/1 T_20.3, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 4;
    %cmp/u;
    %jmp/1 T_20.4, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 4;
    %cmp/u;
    %jmp/1 T_20.5, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 4;
    %cmp/u;
    %jmp/1 T_20.6, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 4;
    %cmp/u;
    %jmp/1 T_20.7, 6;
    %pushi/vec4 0, 0, 4;
    %store/vec4 v000001ab0ebe6b40_0, 0, 4;
    %jmp T_20.9;
T_20.0 ;
    %load/vec4 v000001ab0ebe7400_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_20.10, 8;
    %pushi/vec4 1, 0, 4;
    %store/vec4 v000001ab0ebe6b40_0, 0, 4;
T_20.10 ;
    %jmp T_20.9;
T_20.1 ;
    %pushi/vec4 2, 0, 4;
    %store/vec4 v000001ab0ebe6b40_0, 0, 4;
    %jmp T_20.9;
T_20.2 ;
    %load/vec4 v000001ab0ebe5060_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_20.12, 8;
    %pushi/vec4 3, 0, 4;
    %store/vec4 v000001ab0ebe6b40_0, 0, 4;
T_20.12 ;
    %jmp T_20.9;
T_20.3 ;
    %pushi/vec4 4, 0, 4;
    %store/vec4 v000001ab0ebe6b40_0, 0, 4;
    %jmp T_20.9;
T_20.4 ;
    %load/vec4 v000001ab0ebe4910_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_20.14, 8;
    %pushi/vec4 5, 0, 4;
    %store/vec4 v000001ab0ebe6b40_0, 0, 4;
T_20.14 ;
    %jmp T_20.9;
T_20.5 ;
    %pushi/vec4 6, 0, 4;
    %store/vec4 v000001ab0ebe6b40_0, 0, 4;
    %jmp T_20.9;
T_20.6 ;
    %pushi/vec4 7, 0, 4;
    %store/vec4 v000001ab0ebe6b40_0, 0, 4;
    %jmp T_20.9;
T_20.7 ;
    %pushi/vec4 0, 0, 4;
    %store/vec4 v000001ab0ebe6b40_0, 0, 4;
    %jmp T_20.9;
T_20.9 ;
    %pop/vec4 1;
    %jmp T_20;
    .thread T_20, $push;
    .scope S_000001ab0ea07510;
T_21 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebe57e0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_21.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe5240_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe5880_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe70e0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe66e0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe4e80_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe6d20_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe54c0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe6000_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe6aa0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe52e0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe5600_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe5c40_0, 0;
    %jmp T_21.1;
T_21.0 ;
    %load/vec4 v000001ab0ebe75e0_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 4;
    %cmp/u;
    %jmp/1 T_21.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 4;
    %cmp/u;
    %jmp/1 T_21.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 4;
    %cmp/u;
    %jmp/1 T_21.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 4;
    %cmp/u;
    %jmp/1 T_21.5, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 4;
    %cmp/u;
    %jmp/1 T_21.6, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 4;
    %cmp/u;
    %jmp/1 T_21.7, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 4;
    %cmp/u;
    %jmp/1 T_21.8, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 4;
    %cmp/u;
    %jmp/1 T_21.9, 6;
    %jmp T_21.10;
T_21.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe52e0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe6aa0_0, 0;
    %load/vec4 v000001ab0ebe7400_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_21.11, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe52e0_0, 0;
    %load/vec4 v000001ab0ebe6820_0;
    %assign/vec4 v000001ab0ebe5240_0, 0;
T_21.11 ;
    %jmp T_21.10;
T_21.3 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe5600_0, 0;
    %jmp T_21.10;
T_21.4 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe5600_0, 0;
    %load/vec4 v000001ab0ebe5060_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_21.13, 8;
    %load/vec4 v000001ab0ebe5920_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %subi 65536, 0, 32;
    %assign/vec4 v000001ab0ebe5880_0, 0;
T_21.13 ;
    %jmp T_21.10;
T_21.5 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe5c40_0, 0;
    %jmp T_21.10;
T_21.6 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe5c40_0, 0;
    %load/vec4 v000001ab0ebe4910_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_21.15, 8;
    %load/vec4 v000001ab0ebe7540_0;
    %assign/vec4 v000001ab0ebe66e0_0, 0;
    %load/vec4 v000001ab0ebe4f20_0;
    %assign/vec4 v000001ab0ebe4e80_0, 0;
T_21.15 ;
    %jmp T_21.10;
T_21.7 ;
    %load/vec4 v000001ab0ebe5880_0;
    %pad/u 64;
    %load/vec4 v000001ab0ebe5880_0;
    %pad/u 64;
    %mul;
    %store/vec4 v000001ab0ebe6960_0, 0, 64;
    %pushi/vec4 65536, 0, 64;
    %load/vec4 v000001ab0ebe6960_0;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %sub;
    %pad/u 32;
    %store/vec4 v000001ab0ebe6640_0, 0, 32;
    %load/vec4 v000001ab0ebe6640_0;
    %store/vec4 v000001ab0ebdf3e0_0, 0, 32;
    %callf/vec4 TD_sphere3_fsm_32bit_simple_tb.dut.sphere_inst.sqrt_approx, S_000001ab0eabd770;
    %assign/vec4 v000001ab0ebe70e0_0, 0;
    %jmp T_21.10;
T_21.8 ;
    %load/vec4 v000001ab0ebe70e0_0;
    %load/vec4 v000001ab0ebe66e0_0;
    %mul;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebe6d20_0, 0;
    %load/vec4 v000001ab0ebe70e0_0;
    %load/vec4 v000001ab0ebe4e80_0;
    %mul;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebe54c0_0, 0;
    %load/vec4 v000001ab0ebe5880_0;
    %assign/vec4 v000001ab0ebe6000_0, 0;
    %jmp T_21.10;
T_21.9 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe6aa0_0, 0;
    %jmp T_21.10;
T_21.10 ;
    %pop/vec4 1;
T_21.1 ;
    %jmp T_21;
    .thread T_21;
    .scope S_000001ab0ebeae40;
T_22 ;
    %pushi/vec4 8192, 0, 16;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 4836, 0, 16;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 2555, 0, 16;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 1297, 0, 16;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 651, 0, 16;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 326, 0, 16;
    %ix/load 4, 5, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 163, 0, 16;
    %ix/load 4, 6, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 81, 0, 16;
    %ix/load 4, 7, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 41, 0, 16;
    %ix/load 4, 8, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 20, 0, 16;
    %ix/load 4, 9, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 10, 0, 16;
    %ix/load 4, 10, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 5, 0, 16;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 3, 0, 16;
    %ix/load 4, 12, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 1, 0, 16;
    %ix/load 4, 13, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 1, 0, 16;
    %ix/load 4, 14, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %pushi/vec4 0, 0, 16;
    %ix/load 4, 15, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000001ab0ebe6dc0, 4, 0;
    %end;
    .thread T_22;
    .scope S_000001ab0ebeae40;
T_23 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebe6c80_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_23.0, 8;
    %pushi/vec4 0, 0, 2;
    %assign/vec4 v000001ab0ebe5740_0, 0;
    %jmp T_23.1;
T_23.0 ;
    %load/vec4 v000001ab0ebe7360_0;
    %assign/vec4 v000001ab0ebe5740_0, 0;
T_23.1 ;
    %jmp T_23;
    .thread T_23;
    .scope S_000001ab0ebeae40;
T_24 ;
    %wait E_000001ab0eb785b0;
    %load/vec4 v000001ab0ebe5740_0;
    %store/vec4 v000001ab0ebe7360_0, 0, 2;
    %load/vec4 v000001ab0ebe5740_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_24.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_24.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_24.2, 6;
    %jmp T_24.3;
T_24.0 ;
    %load/vec4 v000001ab0ebe68c0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_24.4, 8;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001ab0ebe7360_0, 0, 2;
T_24.4 ;
    %jmp T_24.3;
T_24.1 ;
    %load/vec4 v000001ab0ebe4fc0_0;
    %pad/u 32;
    %cmpi/e 15, 0, 32;
    %jmp/0xz  T_24.6, 4;
    %pushi/vec4 2, 0, 2;
    %store/vec4 v000001ab0ebe7360_0, 0, 2;
T_24.6 ;
    %jmp T_24.3;
T_24.2 ;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001ab0ebe7360_0, 0, 2;
    %jmp T_24.3;
T_24.3 ;
    %pop/vec4 1;
    %jmp T_24;
    .thread T_24, $push;
    .scope S_000001ab0ebeae40;
T_25 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebe6c80_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_25.0, 8;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0ebe7040_0, 0;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0ebe7180_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000001ab0ebe5380_0, 0;
    %pushi/vec4 0, 0, 4;
    %assign/vec4 v000001ab0ebe4fc0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe6780_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe6320_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe6140_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe5100_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000001ab0ebe6be0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe51a0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe6500_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe5560_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebe6460_0, 0;
    %jmp T_25.1;
T_25.0 ;
    %load/vec4 v000001ab0ebe5740_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_25.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_25.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_25.4, 6;
    %jmp T_25.5;
T_25.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe5100_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe6140_0, 0;
    %load/vec4 v000001ab0ebe68c0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_25.6, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebe5100_0, 0;
    %load/vec4 v000001ab0ebe5a60_0;
    %assign/vec4 v000001ab0ebe61e0_0, 0;
    %load/vec4 v000001ab0ebe5a60_0;
    %pad/u 32;
    %cmpi/u 16384, 0, 32;
    %jmp/0xz  T_25.8, 5;
    %load/vec4 v000001ab0ebe5a60_0;
    %store/vec4 v000001ab0ebe6be0_0, 0, 16;
    %pushi/vec4 39797, 0, 17;
    %assign/vec4 v000001ab0ebe7040_0, 0;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0ebe7180_0, 0;
    %jmp T_25.9;
T_25.8 ;
    %load/vec4 v000001ab0ebe5a60_0;
    %pad/u 32;
    %cmpi/u 32768, 0, 32;
    %jmp/0xz  T_25.10, 5;
    %load/vec4 v000001ab0ebe5a60_0;
    %subi 16384, 0, 16;
    %store/vec4 v000001ab0ebe6be0_0, 0, 16;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0ebe7040_0, 0;
    %pushi/vec4 39797, 0, 17;
    %assign/vec4 v000001ab0ebe7180_0, 0;
    %jmp T_25.11;
T_25.10 ;
    %load/vec4 v000001ab0ebe5a60_0;
    %pad/u 32;
    %cmpi/u 49152, 0, 32;
    %jmp/0xz  T_25.12, 5;
    %load/vec4 v000001ab0ebe5a60_0;
    %subi 32768, 0, 16;
    %store/vec4 v000001ab0ebe6be0_0, 0, 16;
    %pushi/vec4 91275, 0, 17;
    %assign/vec4 v000001ab0ebe7040_0, 0;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0ebe7180_0, 0;
    %jmp T_25.13;
T_25.12 ;
    %load/vec4 v000001ab0ebe5a60_0;
    %subi 49152, 0, 16;
    %store/vec4 v000001ab0ebe6be0_0, 0, 16;
    %pushi/vec4 0, 0, 17;
    %assign/vec4 v000001ab0ebe7040_0, 0;
    %pushi/vec4 91275, 0, 17;
    %assign/vec4 v000001ab0ebe7180_0, 0;
T_25.13 ;
T_25.11 ;
T_25.9 ;
    %load/vec4 v000001ab0ebe6be0_0;
    %assign/vec4 v000001ab0ebe5380_0, 0;
    %pushi/vec4 0, 0, 4;
    %assign/vec4 v000001ab0ebe4fc0_0, 0;
T_25.6 ;
    %jmp T_25.5;
T_25.3 ;
    %load/vec4 v000001ab0ebe5380_0;
    %parti/s 1, 15, 5;
    %flag_set/vec4 8;
    %jmp/0xz  T_25.14, 8;
    %load/vec4 v000001ab0ebe7040_0;
    %load/vec4 v000001ab0ebe7180_0;
    %ix/getv 4, v000001ab0ebe4fc0_0;
    %shiftr 4;
    %add;
    %assign/vec4 v000001ab0ebe7040_0, 0;
    %load/vec4 v000001ab0ebe7180_0;
    %load/vec4 v000001ab0ebe7040_0;
    %ix/getv 4, v000001ab0ebe4fc0_0;
    %shiftr 4;
    %sub;
    %assign/vec4 v000001ab0ebe7180_0, 0;
    %load/vec4 v000001ab0ebe5380_0;
    %load/vec4 v000001ab0ebe4fc0_0;
    %pad/u 6;
    %ix/vec4 4;
    %load/vec4a v000001ab0ebe6dc0, 4;
    %add;
    %assign/vec4 v000001ab0ebe5380_0, 0;
    %jmp T_25.15;
T_25.14 ;
    %load/vec4 v000001ab0ebe7040_0;
    %load/vec4 v000001ab0ebe7180_0;
    %ix/getv 4, v000001ab0ebe4fc0_0;
    %shiftr 4;
    %sub;
    %assign/vec4 v000001ab0ebe7040_0, 0;
    %load/vec4 v000001ab0ebe7180_0;
    %load/vec4 v000001ab0ebe7040_0;
    %ix/getv 4, v000001ab0ebe4fc0_0;
    %shiftr 4;
    %add;
    %assign/vec4 v000001ab0ebe7180_0, 0;
    %load/vec4 v000001ab0ebe5380_0;
    %load/vec4 v000001ab0ebe4fc0_0;
    %pad/u 6;
    %ix/vec4 4;
    %load/vec4a v000001ab0ebe6dc0, 4;
    %sub;
    %assign/vec4 v000001ab0ebe5380_0, 0;
T_25.15 ;
    %load/vec4 v000001ab0ebe4fc0_0;
    %addi 1, 0, 4;
    %assign/vec4 v000001ab0ebe4fc0_0, 0;
    %jmp T_25.5;
T_25.4 ;
    %load/vec4 v000001ab0ebe7040_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %load/vec4 v000001ab0ebe7040_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v000001ab0ebe7040_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v000001ab0ebe7040_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 6, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %store/vec4 v000001ab0ebe51a0_0, 0, 32;
    %load/vec4 v000001ab0ebe7180_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %load/vec4 v000001ab0ebe7180_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v000001ab0ebe7180_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %load/vec4 v000001ab0ebe7180_0;
    %parti/s 16, 0, 2;
    %concati/vec4 0, 0, 16;
    %ix/load 4, 6, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %add;
    %store/vec4 v000001ab0ebe6500_0, 0, 32;
    %load/vec4 v000001ab0ebe61e0_0;
    %pad/u 32;
    %cmpi/u 16384, 0, 32;
    %jmp/0xz  T_25.16, 5;
    %load/vec4 v000001ab0ebe51a0_0;
    %store/vec4 v000001ab0ebe5560_0, 0, 32;
    %load/vec4 v000001ab0ebe6500_0;
    %store/vec4 v000001ab0ebe6460_0, 0, 32;
    %jmp T_25.17;
T_25.16 ;
    %load/vec4 v000001ab0ebe61e0_0;
    %pad/u 32;
    %cmpi/u 32768, 0, 32;
    %jmp/0xz  T_25.18, 5;
    %load/vec4 v000001ab0ebe6500_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v000001ab0ebe5560_0, 0, 32;
    %load/vec4 v000001ab0ebe51a0_0;
    %store/vec4 v000001ab0ebe6460_0, 0, 32;
    %jmp T_25.19;
T_25.18 ;
    %load/vec4 v000001ab0ebe61e0_0;
    %pad/u 32;
    %cmpi/u 49152, 0, 32;
    %jmp/0xz  T_25.20, 5;
    %load/vec4 v000001ab0ebe51a0_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v000001ab0ebe5560_0, 0, 32;
    %load/vec4 v000001ab0ebe6500_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v000001ab0ebe6460_0, 0, 32;
    %jmp T_25.21;
T_25.20 ;
    %load/vec4 v000001ab0ebe6500_0;
    %store/vec4 v000001ab0ebe5560_0, 0, 32;
    %load/vec4 v000001ab0ebe51a0_0;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %store/vec4 v000001ab0ebe6460_0, 0, 32;
T_25.21 ;
T_25.19 ;
T_25.17 ;
    %load/vec4 v000001ab0ebe5560_0;
    %assign/vec4 v000001ab0ebe6780_0, 0;
    %load/vec4 v000001ab0ebe6460_0;
    %assign/vec4 v000001ab0ebe6320_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebe6140_0, 0;
    %jmp T_25.5;
T_25.5 ;
    %pop/vec4 1;
T_25.1 ;
    %jmp T_25;
    .thread T_25;
    .scope S_000001ab0ea7e4b0;
T_26 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebef9e0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_26.0, 8;
    %pushi/vec4 0, 0, 4;
    %assign/vec4 v000001ab0ebee5e0_0, 0;
    %jmp T_26.1;
T_26.0 ;
    %load/vec4 v000001ab0ebeec20_0;
    %assign/vec4 v000001ab0ebee5e0_0, 0;
T_26.1 ;
    %jmp T_26;
    .thread T_26;
    .scope S_000001ab0ea7e4b0;
T_27 ;
    %wait E_000001ab0eb78bb0;
    %load/vec4 v000001ab0ebee5e0_0;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
    %load/vec4 v000001ab0ebee5e0_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 4;
    %cmp/u;
    %jmp/1 T_27.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 4;
    %cmp/u;
    %jmp/1 T_27.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 4;
    %cmp/u;
    %jmp/1 T_27.2, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 4;
    %cmp/u;
    %jmp/1 T_27.3, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 4;
    %cmp/u;
    %jmp/1 T_27.4, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 4;
    %cmp/u;
    %jmp/1 T_27.5, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 4;
    %cmp/u;
    %jmp/1 T_27.6, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 4;
    %cmp/u;
    %jmp/1 T_27.7, 6;
    %dup/vec4;
    %pushi/vec4 8, 0, 4;
    %cmp/u;
    %jmp/1 T_27.8, 6;
    %pushi/vec4 0, 0, 4;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
    %jmp T_27.10;
T_27.0 ;
    %load/vec4 v000001ab0ebeefe0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_27.11, 8;
    %pushi/vec4 1, 0, 4;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
T_27.11 ;
    %jmp T_27.10;
T_27.1 ;
    %pushi/vec4 2, 0, 4;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
    %jmp T_27.10;
T_27.2 ;
    %load/vec4 v000001ab0ebefb20_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_27.13, 8;
    %pushi/vec4 3, 0, 4;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
T_27.13 ;
    %jmp T_27.10;
T_27.3 ;
    %pushi/vec4 4, 0, 4;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
    %jmp T_27.10;
T_27.4 ;
    %load/vec4 v000001ab0ebf03e0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_27.15, 8;
    %pushi/vec4 5, 0, 4;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
T_27.15 ;
    %jmp T_27.10;
T_27.5 ;
    %pushi/vec4 6, 0, 4;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
    %jmp T_27.10;
T_27.6 ;
    %load/vec4 v000001ab0ebefa80_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_27.17, 8;
    %pushi/vec4 7, 0, 4;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
T_27.17 ;
    %jmp T_27.10;
T_27.7 ;
    %pushi/vec4 8, 0, 4;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
    %jmp T_27.10;
T_27.8 ;
    %pushi/vec4 0, 0, 4;
    %store/vec4 v000001ab0ebeec20_0, 0, 4;
    %jmp T_27.10;
T_27.10 ;
    %pop/vec4 1;
    %jmp T_27;
    .thread T_27, $push;
    .scope S_000001ab0ea7e4b0;
T_28 ;
    %wait E_000001ab0eb78970;
    %load/vec4 v000001ab0ebef9e0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_28.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebeeb80_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebf00c0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebefc60_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebee540_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebf0340_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebef620_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebef6c0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebefee0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebef940_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebf0160_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebef3a0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebec9c0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebeca60_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebec7e0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebefbc0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebef440_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebef8a0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001ab0ebef760_0, 0;
    %jmp T_28.1;
T_28.0 ;
    %load/vec4 v000001ab0ebee5e0_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 4;
    %cmp/u;
    %jmp/1 T_28.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 4;
    %cmp/u;
    %jmp/1 T_28.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 4;
    %cmp/u;
    %jmp/1 T_28.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 4;
    %cmp/u;
    %jmp/1 T_28.5, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 4;
    %cmp/u;
    %jmp/1 T_28.6, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 4;
    %cmp/u;
    %jmp/1 T_28.7, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 4;
    %cmp/u;
    %jmp/1 T_28.8, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 4;
    %cmp/u;
    %jmp/1 T_28.9, 6;
    %dup/vec4;
    %pushi/vec4 8, 0, 4;
    %cmp/u;
    %jmp/1 T_28.10, 6;
    %jmp T_28.11;
T_28.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebec7e0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebeca60_0, 0;
    %load/vec4 v000001ab0ebeefe0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_28.12, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebec7e0_0, 0;
    %load/vec4 v000001ab0ebee7c0_0;
    %assign/vec4 v000001ab0ebeeb80_0, 0;
T_28.12 ;
    %jmp T_28.11;
T_28.3 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebefbc0_0, 0;
    %jmp T_28.11;
T_28.4 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebefbc0_0, 0;
    %load/vec4 v000001ab0ebefb20_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_28.14, 8;
    %load/vec4 v000001ab0ebf02a0_0;
    %muli 102943, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebf00c0_0, 0;
T_28.14 ;
    %jmp T_28.11;
T_28.5 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebef440_0, 0;
    %jmp T_28.11;
T_28.6 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebef440_0, 0;
    %load/vec4 v000001ab0ebf03e0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_28.16, 8;
    %load/vec4 v000001ab0ebf0020_0;
    %assign/vec4 v000001ab0ebef620_0, 0;
    %load/vec4 v000001ab0ebef580_0;
    %assign/vec4 v000001ab0ebef6c0_0, 0;
    %load/vec4 v000001ab0ebef4e0_0;
    %assign/vec4 v000001ab0ebefee0_0, 0;
    %load/vec4 v000001ab0ebf00c0_0;
    %store/vec4 v000001ab0eb6dae0_0, 0, 32;
    %callf/vec4 TD_sphere3_fsm_32bit_simple_tb.dut.interpolate_xi, S_000001ab0ea7e640;
    %assign/vec4 v000001ab0ebefc60_0, 0;
T_28.16 ;
    %jmp T_28.11;
T_28.7 ;
    %load/vec4 v000001ab0ebefc60_0;
    %muli 65536, 0, 32;
    %pushi/vec4 411774, 0, 32;
    %div;
    %assign/vec4 v000001ab0ebef760_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebef8a0_0, 0;
    %jmp T_28.11;
T_28.8 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001ab0ebef8a0_0, 0;
    %load/vec4 v000001ab0ebefa80_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_28.18, 8;
    %load/vec4 v000001ab0ebf0200_0;
    %assign/vec4 v000001ab0ebee540_0, 0;
    %load/vec4 v000001ab0ebf0520_0;
    %assign/vec4 v000001ab0ebf0340_0, 0;
T_28.18 ;
    %jmp T_28.11;
T_28.9 ;
    %load/vec4 v000001ab0ebf0340_0;
    %load/vec4 v000001ab0ebef620_0;
    %mul;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebef940_0, 0;
    %load/vec4 v000001ab0ebf0340_0;
    %load/vec4 v000001ab0ebef6c0_0;
    %mul;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebf0160_0, 0;
    %load/vec4 v000001ab0ebf0340_0;
    %load/vec4 v000001ab0ebefee0_0;
    %mul;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001ab0ebef3a0_0, 0;
    %load/vec4 v000001ab0ebee540_0;
    %assign/vec4 v000001ab0ebec9c0_0, 0;
    %jmp T_28.11;
T_28.10 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001ab0ebeca60_0, 0;
    %jmp T_28.11;
T_28.11 ;
    %pop/vec4 1;
T_28.1 ;
    %jmp T_28;
    .thread T_28;
    .scope S_000001ab0eb7be40;
T_29 ;
    %delay 5000, 0;
    %load/vec4 v000001ab0ebef080_0;
    %inv;
    %store/vec4 v000001ab0ebef080_0, 0, 1;
    %jmp T_29;
    .thread T_29;
    .scope S_000001ab0eb7be40;
T_30 ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000001ab0ebef080_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000001ab0ebf3e40_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000001ab0ebf4480_0, 0, 1;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001ab0ebef260_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001ab0ebefda0_0, 0, 2;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001ab0ebefe40_0, 0, 2;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001ab0ebeff80_0, 0, 2;
    %delay 20000, 0;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000001ab0ebf3e40_0, 0, 1;
    %delay 20000, 0;
    %vpi_call 2 96 "$display", "Testing Sphere3 sequence generator" {0 0 0};
    %vpi_call 2 97 "$display", "==================================" {0 0 0};
    %vpi_call 2 98 "$display", "Base mapping: 00=2, 01=3, 10=7" {0 0 0};
    %vpi_call 2 104 "$display", "\012Testing base combination [2,3,7]:" {0 0 0};
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001ab0ebef120_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001ab0ebf0660_0, 0, 2;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001ab0ebefd00_0, 0, 2;
    %pushi/vec4 2, 0, 2;
    %store/vec4 v000001ab0ebef800_0, 0, 2;
    %fork TD_sphere3_fsm_32bit_simple_tb.run_test, S_000001ab0ebebc70;
    %join;
    %pushi/vec4 1, 0, 32;
    %store/vec4 v000001ab0ebef120_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001ab0ebf0660_0, 0, 2;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001ab0ebefd00_0, 0, 2;
    %pushi/vec4 2, 0, 2;
    %store/vec4 v000001ab0ebef800_0, 0, 2;
    %fork TD_sphere3_fsm_32bit_simple_tb.run_test, S_000001ab0ebebc70;
    %join;
    %pushi/vec4 2, 0, 32;
    %store/vec4 v000001ab0ebef120_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001ab0ebf0660_0, 0, 2;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001ab0ebefd00_0, 0, 2;
    %pushi/vec4 2, 0, 2;
    %store/vec4 v000001ab0ebef800_0, 0, 2;
    %fork TD_sphere3_fsm_32bit_simple_tb.run_test, S_000001ab0ebebc70;
    %join;
    %vpi_call 2 109 "$display", "\012Testing base combination [2,3,5]:" {0 0 0};
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001ab0ebef120_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001ab0ebf0660_0, 0, 2;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001ab0ebefd00_0, 0, 2;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001ab0ebef800_0, 0, 2;
    %fork TD_sphere3_fsm_32bit_simple_tb.run_test, S_000001ab0ebebc70;
    %join;
    %vpi_call 2 112 "$display", "\012Testing base combination [3,5,7]:" {0 0 0};
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001ab0ebef120_0, 0, 32;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001ab0ebf0660_0, 0, 2;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001ab0ebefd00_0, 0, 2;
    %pushi/vec4 2, 0, 2;
    %store/vec4 v000001ab0ebef800_0, 0, 2;
    %fork TD_sphere3_fsm_32bit_simple_tb.run_test, S_000001ab0ebebc70;
    %join;
    %vpi_call 2 115 "$display", "\012Testing base combination [2,7,3]:" {0 0 0};
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001ab0ebef120_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001ab0ebf0660_0, 0, 2;
    %pushi/vec4 2, 0, 2;
    %store/vec4 v000001ab0ebefd00_0, 0, 2;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001ab0ebef800_0, 0, 2;
    %fork TD_sphere3_fsm_32bit_simple_tb.run_test, S_000001ab0ebebc70;
    %join;
    %vpi_call 2 118 "$display", "\012All tests completed" {0 0 0};
    %vpi_call 2 119 "$finish" {0 0 0};
    %end;
    .thread T_30;
    .scope S_000001ab0eb7bfd0;
T_31 ;
    %wait E_000001ab0eb78ab0;
    %load/vec4 v000001ab0ebf4660_0;
    %addi 32768, 0, 32;
    %store/vec4 v000001ab0ebf3580_0, 0, 32;
    %load/vec4 v000001ab0ebf3580_0;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_31.0, 4;
    %load/vec4 v000001ab0ebf4660_0;
    %pad/u 48;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %load/vec4 v000001ab0ebf3580_0;
    %pad/u 48;
    %div;
    %store/vec4 v000001ab0ebf3620_0, 0, 48;
    %load/vec4 v000001ab0ebf3580_0;
    %load/vec4 v000001ab0ebf3620_0;
    %parti/s 32, 0, 2;
    %add;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %store/vec4 v000001ab0ebf38a0_0, 0, 32;
    %jmp T_31.1;
T_31.0 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001ab0ebf38a0_0, 0, 32;
T_31.1 ;
    %load/vec4 v000001ab0ebf38a0_0;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_31.2, 4;
    %load/vec4 v000001ab0ebf4660_0;
    %pad/u 48;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %load/vec4 v000001ab0ebf38a0_0;
    %pad/u 48;
    %div;
    %store/vec4 v000001ab0ebf4d40_0, 0, 48;
    %load/vec4 v000001ab0ebf38a0_0;
    %load/vec4 v000001ab0ebf4d40_0;
    %parti/s 32, 0, 2;
    %add;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %store/vec4 v000001ab0ebf3440_0, 0, 32;
    %jmp T_31.3;
T_31.2 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001ab0ebf3440_0, 0, 32;
T_31.3 ;
    %load/vec4 v000001ab0ebf3440_0;
    %store/vec4 v000001ab0ebf2cc0_0, 0, 32;
    %jmp T_31;
    .thread T_31, $push;
# The file index is used to find the file name in the following table.
:file_names 11;
    "N/A";
    "<interactive>";
    "sphere3_fsm_32bit_simple_tb.v";
    "sphere3_fsm_32bit_simple.v";
    "sphere_fsm_32bit_simple.v";
    "circle_fsm_32bit_simple_fixed.v";
    "cordic_trig_16bit_simple_fixed.v";
    "vdcorput_fsm_32bit_simple.v";
    "div_mod_3.v";
    "div_mod_7.v";
    "sqrt_approx_16_16.v";
