#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\system.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\vhdl_sys.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\vhdl_textio.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\v2005_math.vpi";
:vpi_module "D:\scoop\apps\iverilog\current\lib\ivl\va_math.vpi";
S_000001f40a66be10 .scope module, "sphere_final_test" "sphere_final_test" 2 8;
 .timescale -9 -12;
P_000001f40aa6d100 .param/l "CLK_PERIOD" 0 2 10, +C4<00000000000000000000000000001010>;
v000001f40aacc780_0 .var "base_sel0", 1 0;
v000001f40aacd0e0_0 .var "base_sel1", 1 0;
v000001f40aaccd20_0 .var "clk", 0 0;
v000001f40aacd4a0_0 .net "done", 0 0, v000001f40aacac70_0;  1 drivers
v000001f40aacd900_0 .var "k_in", 31 0;
v000001f40aacd360_0 .net "ready", 0 0, v000001f40aacb8f0_0;  1 drivers
v000001f40aacd400_0 .net "result_x", 31 0, v000001f40aaca9f0_0;  1 drivers
v000001f40aacc140_0 .net "result_y", 31 0, v000001f40aacaef0_0;  1 drivers
v000001f40aacc280_0 .net "result_z", 31 0, v000001f40aacaf90_0;  1 drivers
v000001f40aaccbe0_0 .var "rst_n", 0 0;
v000001f40aaccfa0_0 .var "start", 0 0;
S_000001f40aa213e0 .scope module, "dut" "sphere_fsm_32bit_simple_minimal" 2 25, 3 6 0, S_000001f40a66be10;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "k_in";
    .port_info 4 /INPUT 2 "base_sel0";
    .port_info 5 /INPUT 2 "base_sel1";
    .port_info 6 /OUTPUT 32 "result_x";
    .port_info 7 /OUTPUT 32 "result_y";
    .port_info 8 /OUTPUT 32 "result_z";
    .port_info 9 /OUTPUT 1 "done";
    .port_info 10 /OUTPUT 1 "ready";
P_000001f40aa038c0 .param/l "CALC_OUTPUT" 0 3 27, C4<0110>;
P_000001f40aa038f8 .param/l "CALC_SINPHI" 0 3 26, C4<0101>;
P_000001f40aa03930 .param/l "CIRCLE_CALC" 0 3 72, C4<01>;
P_000001f40aa03968 .param/l "CIRCLE_DONE" 0 3 73, C4<10>;
P_000001f40aa039a0 .param/l "CIRCLE_IDLE" 0 3 71, C4<00>;
P_000001f40aa039d8 .param/l "FINISH" 0 3 28, C4<0111>;
P_000001f40aa03a10 .param/l "FP_NEG_ONE" 0 3 42, C4<11111111111111110000000000000000>;
P_000001f40aa03a48 .param/l "FP_ONE" 0 3 40, C4<00000000000000010000000000000000>;
P_000001f40aa03a80 .param/l "FP_TWO" 0 3 41, C4<00000000000000100000000000000000>;
P_000001f40aa03ab8 .param/l "IDLE" 0 3 21, C4<0000>;
P_000001f40aa03af0 .param/l "START_CIRCLE" 0 3 24, C4<0011>;
P_000001f40aa03b28 .param/l "START_VDC" 0 3 22, C4<0001>;
P_000001f40aa03b60 .param/l "WAIT_CIRCLE" 0 3 25, C4<0100>;
P_000001f40aa03b98 .param/l "WAIT_VDC" 0 3 23, C4<0010>;
L_000001f40aa4d690 .functor BUFZ 32, v000001f40aacc3c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_000001f40aa4d700 .functor BUFZ 32, v000001f40aacc460_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_000001f40aa4dc40 .functor BUFZ 1, v000001f40aacb7b0_0, C4<0>, C4<0>, C4<0>;
L_000001f40aa3ac30 .functor BUFZ 1, v000001f40aacd5e0_0, C4<0>, C4<0>, C4<0>;
v000001f40aacbfd0_0 .net "base_sel0", 1 0, v000001f40aacc780_0;  1 drivers
v000001f40aaca6d0_0 .net "base_sel1", 1 0, v000001f40aacd0e0_0;  1 drivers
v000001f40aaca3b0_0 .net "circle_done", 0 0, L_000001f40aa4dc40;  1 drivers
v000001f40aaca130_0 .net "circle_ready", 0 0, L_000001f40aa3ac30;  1 drivers
v000001f40aaca270_0 .net "circle_result_x", 31 0, L_000001f40aa4d690;  1 drivers
v000001f40aacaa90_0 .net "circle_result_y", 31 0, L_000001f40aa4d700;  1 drivers
v000001f40aacb2b0_0 .var "circle_start", 0 0;
v000001f40aaca770_0 .var "circle_state", 1 0;
v000001f40aacb490_0 .var "circle_x_reg", 31 0;
v000001f40aacb530_0 .var "circle_y_reg", 31 0;
v000001f40aaca4f0_0 .net "clk", 0 0, v000001f40aaccd20_0;  1 drivers
v000001f40aaca310_0 .var "cosphi_reg", 31 0;
v000001f40aaca450_0 .var "cosphi_sq_temp", 63 0;
v000001f40aacae50_0 .var "current_state", 3 0;
v000001f40aacac70_0 .var "done", 0 0;
v000001f40aacb990_0 .net "k_in", 31 0, v000001f40aacd900_0;  1 drivers
v000001f40aaca950_0 .var "k_reg", 31 0;
v000001f40aaca590_0 .var "next_state", 3 0;
v000001f40aacba30_0 .var "one_minus_cosphi_sq_temp", 31 0;
v000001f40aacb8f0_0 .var "ready", 0 0;
v000001f40aaca9f0_0 .var "result_x", 31 0;
v000001f40aacaef0_0 .var "result_y", 31 0;
v000001f40aacaf90_0 .var "result_z", 31 0;
v000001f40aacb0d0_0 .net "rst_n", 0 0, v000001f40aaccbe0_0;  1 drivers
v000001f40aacb7b0_0 .var "simple_circle_done", 0 0;
v000001f40aacd5e0_0 .var "simple_circle_ready", 0 0;
v000001f40aacc3c0_0 .var "simple_circle_x", 31 0;
v000001f40aacc460_0 .var "simple_circle_y", 31 0;
v000001f40aacd040_0 .var "sinphi_reg", 31 0;
v000001f40aacd680_0 .var "sqrt_temp", 31 0;
v000001f40aaccc80_0 .net "start", 0 0, v000001f40aaccfa0_0;  1 drivers
v000001f40aacc640_0 .net "vdc_done", 0 0, v000001f40aaca1d0_0;  1 drivers
v000001f40aacce60_0 .net "vdc_ready", 0 0, v000001f40aacabd0_0;  1 drivers
v000001f40aacd7c0_0 .net "vdc_result", 31 0, v000001f40aacb5d0_0;  1 drivers
v000001f40aaccb40_0 .var "vdc_start", 0 0;
E_000001f40aa6d080 .event anyedge, v000001f40aacae50_0, v000001f40aaccc80_0, v000001f40aaca1d0_0, v000001f40aaca3b0_0;
S_000001f40aa21570 .scope module, "vdc_inst" "vdcorput_fsm_32bit_simple" 3 54, 4 9 0, S_000001f40aa213e0;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "k_in";
    .port_info 4 /INPUT 2 "base_sel";
    .port_info 5 /OUTPUT 32 "result";
    .port_info 6 /OUTPUT 1 "done";
    .port_info 7 /OUTPUT 1 "ready";
P_000001f40aa3dbe0 .param/l "ACCUMULATE" 0 4 24, C4<011>;
P_000001f40aa3dc18 .param/l "CHECK" 0 4 26, C4<101>;
P_000001f40aa3dc50 .param/l "DIVIDE" 0 4 23, C4<010>;
P_000001f40aa3dc88 .param/l "FINISH" 0 4 27, C4<110>;
P_000001f40aa3dcc0 .param/l "FP_HALF" 0 4 41, C4<00000000000000001000000000000000>;
P_000001f40aa3dcf8 .param/l "FP_ONE" 0 4 40, C4<00000000000000010000000000000000>;
P_000001f40aa3dd30 .param/l "FP_SEVENTH" 0 4 43, C4<00000000000000000010010010010010>;
P_000001f40aa3dd68 .param/l "FP_THIRD" 0 4 42, C4<00000000000000000101010101010101>;
P_000001f40aa3dda0 .param/l "IDLE" 0 4 21, C4<000>;
P_000001f40aa3ddd8 .param/l "INIT" 0 4 22, C4<001>;
P_000001f40aa3de10 .param/l "UPDATE" 0 4 25, C4<100>;
v000001f40aacadb0_0 .var "acc_reg", 31 0;
v000001f40aacbdf0_0 .var "base_reg", 31 0;
v000001f40aacab30_0 .net "base_sel", 1 0, v000001f40aacc780_0;  alias, 1 drivers
v000001f40aacbc10_0 .net "clk", 0 0, v000001f40aaccd20_0;  alias, 1 drivers
v000001f40aacad10_0 .var "current_state", 2 0;
v000001f40aacb170_0 .net "div3_quotient", 7 0, L_000001f40ab18e90;  1 drivers
v000001f40aacb030_0 .net "div3_remainder", 1 0, L_000001f40ab18ad0;  1 drivers
v000001f40aacb210_0 .net "div7_quotient", 8 0, L_000001f40ab18b70;  1 drivers
v000001f40aacbd50_0 .net "div7_remainder", 2 0, L_000001f40ab18f30;  1 drivers
v000001f40aaca1d0_0 .var "done", 0 0;
v000001f40aaca630_0 .net "k_in", 31 0, v000001f40aaca950_0;  1 drivers
v000001f40aacbe90_0 .var "k_reg", 31 0;
v000001f40aacb350_0 .var "next_state", 2 0;
v000001f40aacb670_0 .var "power_reg", 31 0;
v000001f40aacb710_0 .var "quotient_reg", 31 0;
v000001f40aacabd0_0 .var "ready", 0 0;
v000001f40aacb3f0_0 .var "remainder_reg", 31 0;
v000001f40aacb5d0_0 .var "result", 31 0;
v000001f40aacbcb0_0 .net "rst_n", 0 0, v000001f40aaccbe0_0;  alias, 1 drivers
v000001f40aacbf30_0 .net "start", 0 0, v000001f40aaccb40_0;  1 drivers
E_000001f40aa6d780/0 .event negedge, v000001f40aacbcb0_0;
E_000001f40aa6d780/1 .event posedge, v000001f40aacbc10_0;
E_000001f40aa6d780 .event/or E_000001f40aa6d780/0, E_000001f40aa6d780/1;
E_000001f40aa6d040 .event anyedge, v000001f40aacad10_0, v000001f40aacbf30_0, v000001f40aacbe90_0;
L_000001f40ab19d90 .part v000001f40aacbe90_0, 0, 8;
L_000001f40ab19750 .part v000001f40aacbe90_0, 0, 9;
S_000001f40aa3de50 .scope module, "div3_inst" "div_mod_3" 4 52, 5 28 0, S_000001f40aa21570;
 .timescale -9 -12;
    .port_info 0 /INPUT 8 "n";
    .port_info 1 /OUTPUT 8 "quotient";
    .port_info 2 /OUTPUT 2 "remainder";
L_000001f40aace150 .functor BUFT 1, C4<00000>, C4<0>, C4<0>, C4<0>;
v000001f40aa53a10_0 .net *"_ivl_11", 4 0, L_000001f40aace150;  1 drivers
v000001f40aa54190_0 .net *"_ivl_18", 5 0, L_000001f40aacdd60;  1 drivers
L_000001f40aace198 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001f40aa547d0_0 .net *"_ivl_21", 0 0, L_000001f40aace198;  1 drivers
v000001f40aa55130_0 .net *"_ivl_22", 5 0, L_000001f40aacdfe0;  1 drivers
L_000001f40aace1e0 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001f40aa54910_0 .net *"_ivl_25", 3 0, L_000001f40aace1e0;  1 drivers
v000001f40aa54a50_0 .net *"_ivl_32", 4 0, L_000001f40aacde00;  1 drivers
L_000001f40aace228 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001f40aa55090_0 .net *"_ivl_35", 0 0, L_000001f40aace228;  1 drivers
v000001f40aa55450_0 .net *"_ivl_36", 4 0, L_000001f40aacdcc0;  1 drivers
L_000001f40aace270 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001f40aa554f0_0 .net *"_ivl_39", 2 0, L_000001f40aace270;  1 drivers
v000001f40aa54230_0 .net *"_ivl_4", 6 0, L_000001f40aacda40;  1 drivers
v000001f40aa54050_0 .net *"_ivl_43", 2 0, L_000001f40aacc1e0;  1 drivers
v000001f40aa551d0_0 .net *"_ivl_50", 7 0, L_000001f40aacdea0;  1 drivers
L_000001f40aace2b8 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001f40aa54b90_0 .net *"_ivl_53", 1 0, L_000001f40aace2b8;  1 drivers
v000001f40aa542d0_0 .net *"_ivl_54", 7 0, L_000001f40aacdc20;  1 drivers
L_000001f40aace300 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001f40aa55270_0 .net *"_ivl_57", 2 0, L_000001f40aace300;  1 drivers
v000001f40aa553b0_0 .net *"_ivl_58", 7 0, L_000001f40aacc8c0;  1 drivers
v000001f40aa55590_0 .net *"_ivl_60", 7 0, L_000001f40ab18530;  1 drivers
L_000001f40aace348 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001f40aa55630_0 .net *"_ivl_63", 3 0, L_000001f40aace348;  1 drivers
v000001f40aa556d0_0 .net *"_ivl_64", 7 0, L_000001f40ab19610;  1 drivers
v000001f40aa54370_0 .net *"_ivl_66", 7 0, L_000001f40ab187b0;  1 drivers
L_000001f40aace390 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v000001f40aa53dd0_0 .net *"_ivl_69", 5 0, L_000001f40aace390;  1 drivers
L_000001f40aace108 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001f40aa54d70_0 .net *"_ivl_7", 0 0, L_000001f40aace108;  1 drivers
L_000001f40aace3d8 .functor BUFT 1, C4<11>, C4<0>, C4<0>, C4<0>;
v000001f40aa54410_0 .net/2u *"_ivl_72", 1 0, L_000001f40aace3d8;  1 drivers
v000001f40aa54550_0 .net *"_ivl_74", 0 0, L_000001f40ab19430;  1 drivers
L_000001f40aace420 .functor BUFT 1, C4<00000001>, C4<0>, C4<0>, C4<0>;
v000001f40aa53e70_0 .net/2u *"_ivl_76", 7 0, L_000001f40aace420;  1 drivers
v000001f40aa55770_0 .net *"_ivl_78", 7 0, L_000001f40ab18710;  1 drivers
v000001f40aa540f0_0 .net *"_ivl_8", 6 0, L_000001f40aacd180;  1 drivers
L_000001f40aace468 .functor BUFT 1, C4<11>, C4<0>, C4<0>, C4<0>;
v000001f40aa54c30_0 .net/2u *"_ivl_82", 1 0, L_000001f40aace468;  1 drivers
v000001f40aa55810_0 .net *"_ivl_84", 0 0, L_000001f40ab197f0;  1 drivers
L_000001f40aace4b0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001f40aa54cd0_0 .net/2u *"_ivl_86", 1 0, L_000001f40aace4b0;  1 drivers
v000001f40aa53bf0_0 .net "n", 7 0, L_000001f40ab19d90;  1 drivers
v000001f40aa53c90_0 .net "q1", 5 0, L_000001f40aacd540;  1 drivers
v000001f40aac81c0_0 .net "q2", 4 0, L_000001f40aacdf40;  1 drivers
v000001f40aac9340_0 .net "q3", 3 0, L_000001f40aacdb80;  1 drivers
v000001f40aac8ee0_0 .net "q4", 1 0, L_000001f40aaccdc0;  1 drivers
v000001f40aac90c0_0 .net "quotient", 7 0, L_000001f40ab18e90;  alias, 1 drivers
v000001f40aac98e0_0 .net "quotient_sum", 7 0, L_000001f40ab19bb0;  1 drivers
v000001f40aac9160_0 .net "r1", 1 0, L_000001f40aacd9a0;  1 drivers
v000001f40aac9de0_0 .net "r2", 1 0, L_000001f40aacc820;  1 drivers
v000001f40aac8c60_0 .net "r3", 1 0, L_000001f40aacc320;  1 drivers
v000001f40aac8620_0 .net "r4", 1 0, L_000001f40aacc5a0;  1 drivers
v000001f40aac9700_0 .net "rem1", 6 0, L_000001f40aacdae0;  1 drivers
v000001f40aac86c0_0 .net "rem2", 5 0, L_000001f40aaccf00;  1 drivers
v000001f40aac9200_0 .net "rem3", 4 0, L_000001f40aacc6e0;  1 drivers
v000001f40aac8a80_0 .net "rem4", 1 0, L_000001f40aaccaa0;  1 drivers
v000001f40aac97a0_0 .net "remainder", 1 0, L_000001f40ab18ad0;  alias, 1 drivers
L_000001f40aacd540 .part L_000001f40ab19d90, 2, 6;
L_000001f40aacd9a0 .part L_000001f40ab19d90, 0, 2;
L_000001f40aacda40 .concat [ 6 1 0 0], L_000001f40aacd540, L_000001f40aace108;
L_000001f40aacd180 .concat [ 2 5 0 0], L_000001f40aacd9a0, L_000001f40aace150;
L_000001f40aacdae0 .arith/sum 7, L_000001f40aacda40, L_000001f40aacd180;
L_000001f40aacdf40 .part L_000001f40aacdae0, 2, 5;
L_000001f40aacc820 .part L_000001f40aacdae0, 0, 2;
L_000001f40aacdd60 .concat [ 5 1 0 0], L_000001f40aacdf40, L_000001f40aace198;
L_000001f40aacdfe0 .concat [ 2 4 0 0], L_000001f40aacc820, L_000001f40aace1e0;
L_000001f40aaccf00 .arith/sum 6, L_000001f40aacdd60, L_000001f40aacdfe0;
L_000001f40aacdb80 .part L_000001f40aaccf00, 2, 4;
L_000001f40aacc320 .part L_000001f40aaccf00, 0, 2;
L_000001f40aacde00 .concat [ 4 1 0 0], L_000001f40aacdb80, L_000001f40aace228;
L_000001f40aacdcc0 .concat [ 2 3 0 0], L_000001f40aacc320, L_000001f40aace270;
L_000001f40aacc6e0 .arith/sum 5, L_000001f40aacde00, L_000001f40aacdcc0;
L_000001f40aacc1e0 .part L_000001f40aacc6e0, 2, 3;
L_000001f40aaccdc0 .part L_000001f40aacc1e0, 0, 2;
L_000001f40aacc5a0 .part L_000001f40aacc6e0, 0, 2;
L_000001f40aaccaa0 .arith/sum 2, L_000001f40aaccdc0, L_000001f40aacc5a0;
L_000001f40aacdea0 .concat [ 6 2 0 0], L_000001f40aacd540, L_000001f40aace2b8;
L_000001f40aacdc20 .concat [ 5 3 0 0], L_000001f40aacdf40, L_000001f40aace300;
L_000001f40aacc8c0 .arith/sum 8, L_000001f40aacdea0, L_000001f40aacdc20;
L_000001f40ab18530 .concat [ 4 4 0 0], L_000001f40aacdb80, L_000001f40aace348;
L_000001f40ab19610 .arith/sum 8, L_000001f40aacc8c0, L_000001f40ab18530;
L_000001f40ab187b0 .concat [ 2 6 0 0], L_000001f40aaccdc0, L_000001f40aace390;
L_000001f40ab19bb0 .arith/sum 8, L_000001f40ab19610, L_000001f40ab187b0;
L_000001f40ab19430 .cmp/eq 2, L_000001f40aaccaa0, L_000001f40aace3d8;
L_000001f40ab18710 .arith/sum 8, L_000001f40ab19bb0, L_000001f40aace420;
L_000001f40ab18e90 .functor MUXZ 8, L_000001f40ab19bb0, L_000001f40ab18710, L_000001f40ab19430, C4<>;
L_000001f40ab197f0 .cmp/eq 2, L_000001f40aaccaa0, L_000001f40aace468;
L_000001f40ab18ad0 .functor MUXZ 2, L_000001f40aaccaa0, L_000001f40aace4b0, L_000001f40ab197f0, C4<>;
S_000001f40aa6b8c0 .scope module, "div7_inst" "div_mod_7" 4 58, 6 14 0, S_000001f40aa21570;
 .timescale -9 -12;
    .port_info 0 /INPUT 9 "n";
    .port_info 1 /OUTPUT 9 "quotient";
    .port_info 2 /OUTPUT 3 "remainder";
L_000001f40aace540 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001f40aac9e80_0 .net *"_ivl_11", 3 0, L_000001f40aace540;  1 drivers
v000001f40aac8800_0 .net *"_ivl_18", 4 0, L_000001f40ab18df0;  1 drivers
L_000001f40aace588 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001f40aac9f20_0 .net *"_ivl_21", 0 0, L_000001f40aace588;  1 drivers
v000001f40aac8580_0 .net *"_ivl_22", 4 0, L_000001f40ab191b0;  1 drivers
L_000001f40aace5d0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001f40aac92a0_0 .net *"_ivl_25", 1 0, L_000001f40aace5d0;  1 drivers
v000001f40aac93e0_0 .net *"_ivl_32", 2 0, L_000001f40ab188f0;  1 drivers
L_000001f40aace618 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001f40aac8300_0 .net *"_ivl_35", 0 0, L_000001f40aace618;  1 drivers
v000001f40aac84e0_0 .net *"_ivl_38", 7 0, L_000001f40ab18670;  1 drivers
v000001f40aac9c00_0 .net *"_ivl_4", 6 0, L_000001f40ab185d0;  1 drivers
L_000001f40aace660 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000001f40aac9480_0 .net *"_ivl_41", 1 0, L_000001f40aace660;  1 drivers
v000001f40aac9520_0 .net *"_ivl_42", 7 0, L_000001f40ab19b10;  1 drivers
L_000001f40aace6a8 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v000001f40aac8260_0 .net *"_ivl_45", 3 0, L_000001f40aace6a8;  1 drivers
v000001f40aac9840_0 .net *"_ivl_46", 7 0, L_000001f40ab18990;  1 drivers
v000001f40aac95c0_0 .net *"_ivl_48", 7 0, L_000001f40ab18490;  1 drivers
L_000001f40aace6f0 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v000001f40aac9020_0 .net *"_ivl_51", 5 0, L_000001f40aace6f0;  1 drivers
L_000001f40aace738 .functor BUFT 1, C4<111>, C4<0>, C4<0>, C4<0>;
v000001f40aac8bc0_0 .net/2u *"_ivl_54", 2 0, L_000001f40aace738;  1 drivers
v000001f40aac83a0_0 .net *"_ivl_56", 0 0, L_000001f40ab19cf0;  1 drivers
v000001f40aac9fc0_0 .net *"_ivl_58", 8 0, L_000001f40ab19890;  1 drivers
L_000001f40aace780 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001f40aac8da0_0 .net *"_ivl_61", 0 0, L_000001f40aace780;  1 drivers
L_000001f40aace7c8 .functor BUFT 1, C4<000000001>, C4<0>, C4<0>, C4<0>;
v000001f40aac9660_0 .net/2u *"_ivl_62", 8 0, L_000001f40aace7c8;  1 drivers
v000001f40aac9980_0 .net *"_ivl_64", 8 0, L_000001f40ab18a30;  1 drivers
v000001f40aac9a20_0 .net *"_ivl_66", 8 0, L_000001f40ab18170;  1 drivers
L_000001f40aace810 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001f40aac8d00_0 .net *"_ivl_69", 0 0, L_000001f40aace810;  1 drivers
L_000001f40aace4f8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000001f40aac8440_0 .net *"_ivl_7", 0 0, L_000001f40aace4f8;  1 drivers
L_000001f40aace858 .functor BUFT 1, C4<111>, C4<0>, C4<0>, C4<0>;
v000001f40aac88a0_0 .net/2u *"_ivl_72", 2 0, L_000001f40aace858;  1 drivers
v000001f40aac8760_0 .net *"_ivl_74", 0 0, L_000001f40ab192f0;  1 drivers
L_000001f40aace8a0 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v000001f40aac8e40_0 .net/2u *"_ivl_76", 2 0, L_000001f40aace8a0;  1 drivers
v000001f40aac9ac0_0 .net *"_ivl_8", 6 0, L_000001f40ab19110;  1 drivers
v000001f40aac9b60_0 .net "n", 8 0, L_000001f40ab19750;  1 drivers
v000001f40aac9ca0_0 .net "q1", 5 0, L_000001f40ab18850;  1 drivers
v000001f40aac9d40_0 .net "q2", 3 0, L_000001f40ab19250;  1 drivers
v000001f40aac8f80_0 .net "q3", 1 0, L_000001f40ab19930;  1 drivers
v000001f40aac8120_0 .net "quotient", 8 0, L_000001f40ab18b70;  alias, 1 drivers
v000001f40aac8940_0 .net "quotient_sum", 7 0, L_000001f40ab18fd0;  1 drivers
v000001f40aac89e0_0 .net "r1", 2 0, L_000001f40ab19f70;  1 drivers
v000001f40aac8b20_0 .net "r2", 2 0, L_000001f40ab19070;  1 drivers
v000001f40aaca8b0_0 .net "r3", 2 0, L_000001f40ab196b0;  1 drivers
v000001f40aacb850_0 .net "rem1", 6 0, L_000001f40ab19c50;  1 drivers
v000001f40aacbad0_0 .net "rem2", 4 0, L_000001f40ab182b0;  1 drivers
v000001f40aacbb70_0 .net "rem3", 2 0, L_000001f40ab18350;  1 drivers
v000001f40aaca810_0 .net "remainder", 2 0, L_000001f40ab18f30;  alias, 1 drivers
L_000001f40ab18850 .part L_000001f40ab19750, 3, 6;
L_000001f40ab19f70 .part L_000001f40ab19750, 0, 3;
L_000001f40ab185d0 .concat [ 6 1 0 0], L_000001f40ab18850, L_000001f40aace4f8;
L_000001f40ab19110 .concat [ 3 4 0 0], L_000001f40ab19f70, L_000001f40aace540;
L_000001f40ab19c50 .arith/sum 7, L_000001f40ab185d0, L_000001f40ab19110;
L_000001f40ab19250 .part L_000001f40ab19c50, 3, 4;
L_000001f40ab19070 .part L_000001f40ab19c50, 0, 3;
L_000001f40ab18df0 .concat [ 4 1 0 0], L_000001f40ab19250, L_000001f40aace588;
L_000001f40ab191b0 .concat [ 3 2 0 0], L_000001f40ab19070, L_000001f40aace5d0;
L_000001f40ab182b0 .arith/sum 5, L_000001f40ab18df0, L_000001f40ab191b0;
L_000001f40ab19930 .part L_000001f40ab182b0, 3, 2;
L_000001f40ab196b0 .part L_000001f40ab182b0, 0, 3;
L_000001f40ab188f0 .concat [ 2 1 0 0], L_000001f40ab19930, L_000001f40aace618;
L_000001f40ab18350 .arith/sum 3, L_000001f40ab188f0, L_000001f40ab196b0;
L_000001f40ab18670 .concat [ 6 2 0 0], L_000001f40ab18850, L_000001f40aace660;
L_000001f40ab19b10 .concat [ 4 4 0 0], L_000001f40ab19250, L_000001f40aace6a8;
L_000001f40ab18990 .arith/sum 8, L_000001f40ab18670, L_000001f40ab19b10;
L_000001f40ab18490 .concat [ 2 6 0 0], L_000001f40ab19930, L_000001f40aace6f0;
L_000001f40ab18fd0 .arith/sum 8, L_000001f40ab18990, L_000001f40ab18490;
L_000001f40ab19cf0 .cmp/eq 3, L_000001f40ab18350, L_000001f40aace738;
L_000001f40ab19890 .concat [ 8 1 0 0], L_000001f40ab18fd0, L_000001f40aace780;
L_000001f40ab18a30 .arith/sum 9, L_000001f40ab19890, L_000001f40aace7c8;
L_000001f40ab18170 .concat [ 8 1 0 0], L_000001f40ab18fd0, L_000001f40aace810;
L_000001f40ab18b70 .functor MUXZ 9, L_000001f40ab18170, L_000001f40ab18a30, L_000001f40ab19cf0, C4<>;
L_000001f40ab192f0 .cmp/eq 3, L_000001f40ab18350, L_000001f40aace858;
L_000001f40ab18f30 .functor MUXZ 3, L_000001f40ab18350, L_000001f40aace8a0, L_000001f40ab192f0, C4<>;
S_000001f40aaadbe0 .scope task, "run_test" "run_test" 2 43, 2 43 0, S_000001f40a66be10;
 .timescale -9 -12;
v000001f40aacc500_0 .var "expected_x", 31 0;
v000001f40aacd860_0 .var "expected_y", 31 0;
v000001f40aacd220_0 .var "expected_z", 31 0;
v000001f40aacc960_0 .var "test_base0", 1 0;
v000001f40aacd720_0 .var "test_base1", 1 0;
v000001f40aacd2c0_0 .var "test_k", 31 0;
v000001f40aacca00_0 .var "tolerance", 31 0;
E_000001f40aa6d140 .event posedge, v000001f40aacbc10_0;
E_000001f40aa6cf40 .event anyedge, v000001f40aacac70_0;
E_000001f40aa6cbc0 .event anyedge, v000001f40aacb8f0_0;
TD_sphere_final_test.run_test ;
    %load/vec4 v000001f40aacd2c0_0;
    %store/vec4 v000001f40aacd900_0, 0, 32;
    %load/vec4 v000001f40aacc960_0;
    %store/vec4 v000001f40aacc780_0, 0, 2;
    %load/vec4 v000001f40aacd720_0;
    %store/vec4 v000001f40aacd0e0_0, 0, 2;
T_0.0 ;
    %load/vec4 v000001f40aacd360_0;
    %pad/u 32;
    %pushi/vec4 1, 0, 32;
    %cmp/e;
    %flag_get/vec4 4;
    %cmpi/ne 1, 0, 1;
    %jmp/0xz T_0.1, 6;
    %wait E_000001f40aa6cbc0;
    %jmp T_0.0;
T_0.1 ;
    %wait E_000001f40aa6d140;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000001f40aaccfa0_0, 0, 1;
    %wait E_000001f40aa6d140;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000001f40aaccfa0_0, 0, 1;
T_0.2 ;
    %load/vec4 v000001f40aacd4a0_0;
    %pad/u 32;
    %pushi/vec4 1, 0, 32;
    %cmp/e;
    %flag_get/vec4 4;
    %cmpi/ne 1, 0, 1;
    %jmp/0xz T_0.3, 6;
    %wait E_000001f40aa6cf40;
    %jmp T_0.2;
T_0.3 ;
    %wait E_000001f40aa6d140;
    %load/vec4 v000001f40aacc500_0;
    %load/vec4 v000001f40aacca00_0;
    %sub;
    %load/vec4 v000001f40aacd400_0;
    %cmp/u;
    %flag_or 5, 4;
    %flag_get/vec4 5;
    %jmp/0 T_0.10, 5;
    %load/vec4 v000001f40aacd400_0;
    %load/vec4 v000001f40aacc500_0;
    %load/vec4 v000001f40aacca00_0;
    %add;
    %cmp/u;
    %flag_get/vec4 4;
    %flag_get/vec4 5;
    %or;
    %and;
T_0.10;
    %flag_set/vec4 12;
    %flag_get/vec4 12;
    %jmp/0 T_0.9, 12;
    %load/vec4 v000001f40aacd860_0;
    %load/vec4 v000001f40aacca00_0;
    %sub;
    %load/vec4 v000001f40aacc140_0;
    %cmp/u;
    %flag_get/vec4 4;
    %flag_get/vec4 5;
    %or;
    %and;
T_0.9;
    %flag_set/vec4 11;
    %flag_get/vec4 11;
    %jmp/0 T_0.8, 11;
    %load/vec4 v000001f40aacc140_0;
    %load/vec4 v000001f40aacd860_0;
    %load/vec4 v000001f40aacca00_0;
    %add;
    %cmp/u;
    %flag_get/vec4 4;
    %flag_get/vec4 5;
    %or;
    %and;
T_0.8;
    %flag_set/vec4 10;
    %flag_get/vec4 10;
    %jmp/0 T_0.7, 10;
    %load/vec4 v000001f40aacd220_0;
    %load/vec4 v000001f40aacca00_0;
    %sub;
    %load/vec4 v000001f40aacc280_0;
    %cmp/u;
    %flag_get/vec4 4;
    %flag_get/vec4 5;
    %or;
    %and;
T_0.7;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_0.6, 9;
    %load/vec4 v000001f40aacc280_0;
    %load/vec4 v000001f40aacd220_0;
    %load/vec4 v000001f40aacca00_0;
    %add;
    %cmp/u;
    %flag_get/vec4 4;
    %flag_get/vec4 5;
    %or;
    %and;
T_0.6;
    %flag_set/vec4 8;
    %jmp/0xz  T_0.4, 8;
    %load/vec4 v000001f40aacc960_0;
    %pad/u 32;
    %addi 2, 0, 32;
    %load/vec4 v000001f40aacd720_0;
    %pad/u 32;
    %addi 2, 0, 32;
    %vpi_call 2 69 "$display", "PASS: count=%0d, bases=[%0d,%0d]", v000001f40aacd2c0_0, S<1,vec4,u32>, S<0,vec4,u32> {2 0 0};
    %jmp T_0.5;
T_0.4 ;
    %load/vec4 v000001f40aacc960_0;
    %pad/u 32;
    %addi 2, 0, 32;
    %load/vec4 v000001f40aacd720_0;
    %pad/u 32;
    %addi 2, 0, 32;
    %vpi_call 2 71 "$display", "FAIL: count=%0d, bases=[%0d,%0d]", v000001f40aacd2c0_0, S<1,vec4,u32>, S<0,vec4,u32> {2 0 0};
    %vpi_call 2 72 "$display", "  got: x=%h, y=%h, z=%h", v000001f40aacd400_0, v000001f40aacc140_0, v000001f40aacc280_0 {0 0 0};
    %vpi_call 2 73 "$display", "  exp: x=%h, y=%h, z=%h", v000001f40aacc500_0, v000001f40aacd860_0, v000001f40aacd220_0 {0 0 0};
T_0.5 ;
    %delay 50000, 0;
    %end;
    .scope S_000001f40aa21570;
T_1 ;
    %wait E_000001f40aa6d780;
    %load/vec4 v000001f40aacbcb0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_1.0, 8;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v000001f40aacad10_0, 0;
    %jmp T_1.1;
T_1.0 ;
    %load/vec4 v000001f40aacb350_0;
    %assign/vec4 v000001f40aacad10_0, 0;
T_1.1 ;
    %jmp T_1;
    .thread T_1;
    .scope S_000001f40aa21570;
T_2 ;
    %wait E_000001f40aa6d040;
    %load/vec4 v000001f40aacad10_0;
    %store/vec4 v000001f40aacb350_0, 0, 3;
    %load/vec4 v000001f40aacad10_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_2.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_2.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_2.2, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_2.3, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_2.4, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_2.5, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 3;
    %cmp/u;
    %jmp/1 T_2.6, 6;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v000001f40aacb350_0, 0, 3;
    %jmp T_2.8;
T_2.0 ;
    %load/vec4 v000001f40aacbf30_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_2.9, 8;
    %pushi/vec4 1, 0, 3;
    %store/vec4 v000001f40aacb350_0, 0, 3;
T_2.9 ;
    %jmp T_2.8;
T_2.1 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v000001f40aacb350_0, 0, 3;
    %jmp T_2.8;
T_2.2 ;
    %pushi/vec4 3, 0, 3;
    %store/vec4 v000001f40aacb350_0, 0, 3;
    %jmp T_2.8;
T_2.3 ;
    %pushi/vec4 4, 0, 3;
    %store/vec4 v000001f40aacb350_0, 0, 3;
    %jmp T_2.8;
T_2.4 ;
    %pushi/vec4 5, 0, 3;
    %store/vec4 v000001f40aacb350_0, 0, 3;
    %jmp T_2.8;
T_2.5 ;
    %load/vec4 v000001f40aacbe90_0;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_2.11, 4;
    %pushi/vec4 6, 0, 3;
    %store/vec4 v000001f40aacb350_0, 0, 3;
    %jmp T_2.12;
T_2.11 ;
    %pushi/vec4 2, 0, 3;
    %store/vec4 v000001f40aacb350_0, 0, 3;
T_2.12 ;
    %jmp T_2.8;
T_2.6 ;
    %pushi/vec4 0, 0, 3;
    %store/vec4 v000001f40aacb350_0, 0, 3;
    %jmp T_2.8;
T_2.8 ;
    %pop/vec4 1;
    %jmp T_2;
    .thread T_2, $push;
    .scope S_000001f40aa21570;
T_3 ;
    %wait E_000001f40aa6d780;
    %load/vec4 v000001f40aacbcb0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacbe90_0, 0;
    %pushi/vec4 65536, 0, 32;
    %assign/vec4 v000001f40aacb670_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacadb0_0, 0;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001f40aacbdf0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacb3f0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacb710_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacb5d0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aaca1d0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aacabd0_0, 0;
    %jmp T_3.1;
T_3.0 ;
    %load/vec4 v000001f40aacad10_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_3.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_3.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_3.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_3.5, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 3;
    %cmp/u;
    %jmp/1 T_3.6, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_3.7, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 3;
    %cmp/u;
    %jmp/1 T_3.8, 6;
    %jmp T_3.9;
T_3.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aacabd0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aaca1d0_0, 0;
    %load/vec4 v000001f40aacbf30_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_3.10, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aacabd0_0, 0;
    %load/vec4 v000001f40aaca630_0;
    %assign/vec4 v000001f40aacbe90_0, 0;
T_3.10 ;
    %jmp T_3.9;
T_3.3 ;
    %load/vec4 v000001f40aacab30_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_3.12, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_3.13, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_3.14, 6;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001f40aacbdf0_0, 0;
    %pushi/vec4 32768, 0, 32;
    %assign/vec4 v000001f40aacb670_0, 0;
    %jmp T_3.16;
T_3.12 ;
    %pushi/vec4 2, 0, 32;
    %assign/vec4 v000001f40aacbdf0_0, 0;
    %pushi/vec4 32768, 0, 32;
    %assign/vec4 v000001f40aacb670_0, 0;
    %jmp T_3.16;
T_3.13 ;
    %pushi/vec4 3, 0, 32;
    %assign/vec4 v000001f40aacbdf0_0, 0;
    %pushi/vec4 21845, 0, 32;
    %assign/vec4 v000001f40aacb670_0, 0;
    %jmp T_3.16;
T_3.14 ;
    %pushi/vec4 7, 0, 32;
    %assign/vec4 v000001f40aacbdf0_0, 0;
    %pushi/vec4 9362, 0, 32;
    %assign/vec4 v000001f40aacb670_0, 0;
    %jmp T_3.16;
T_3.16 ;
    %pop/vec4 1;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacadb0_0, 0;
    %jmp T_3.9;
T_3.4 ;
    %load/vec4 v000001f40aacbdf0_0;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_3.17, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 32;
    %cmp/u;
    %jmp/1 T_3.18, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 32;
    %cmp/u;
    %jmp/1 T_3.19, 6;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacb710_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacb3f0_0, 0;
    %jmp T_3.21;
T_3.17 ;
    %load/vec4 v000001f40aacbe90_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001f40aacb710_0, 0;
    %load/vec4 v000001f40aacbe90_0;
    %parti/s 1, 0, 2;
    %pad/u 32;
    %assign/vec4 v000001f40aacb3f0_0, 0;
    %jmp T_3.21;
T_3.18 ;
    %pushi/vec4 0, 0, 24;
    %load/vec4 v000001f40aacb170_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001f40aacb710_0, 0;
    %pushi/vec4 0, 0, 30;
    %load/vec4 v000001f40aacb030_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001f40aacb3f0_0, 0;
    %jmp T_3.21;
T_3.19 ;
    %pushi/vec4 0, 0, 23;
    %load/vec4 v000001f40aacb210_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001f40aacb710_0, 0;
    %pushi/vec4 0, 0, 29;
    %load/vec4 v000001f40aacbd50_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v000001f40aacb3f0_0, 0;
    %jmp T_3.21;
T_3.21 ;
    %pop/vec4 1;
    %jmp T_3.9;
T_3.5 ;
    %load/vec4 v000001f40aacb3f0_0;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_3.22, 4;
    %load/vec4 v000001f40aacadb0_0;
    %load/vec4 v000001f40aacb3f0_0;
    %load/vec4 v000001f40aacb670_0;
    %mul;
    %add;
    %assign/vec4 v000001f40aacadb0_0, 0;
T_3.22 ;
    %jmp T_3.9;
T_3.6 ;
    %load/vec4 v000001f40aacb710_0;
    %assign/vec4 v000001f40aacbe90_0, 0;
    %load/vec4 v000001f40aacbdf0_0;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_3.24, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 32;
    %cmp/u;
    %jmp/1 T_3.25, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 32;
    %cmp/u;
    %jmp/1 T_3.26, 6;
    %jmp T_3.27;
T_3.24 ;
    %load/vec4 v000001f40aacb670_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001f40aacb670_0, 0;
    %jmp T_3.27;
T_3.25 ;
    %load/vec4 v000001f40aacb670_0;
    %muli 21845, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001f40aacb670_0, 0;
    %jmp T_3.27;
T_3.26 ;
    %load/vec4 v000001f40aacb670_0;
    %muli 9362, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001f40aacb670_0, 0;
    %jmp T_3.27;
T_3.27 ;
    %pop/vec4 1;
    %jmp T_3.9;
T_3.7 ;
    %jmp T_3.9;
T_3.8 ;
    %load/vec4 v000001f40aacadb0_0;
    %assign/vec4 v000001f40aacb5d0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aaca1d0_0, 0;
    %jmp T_3.9;
T_3.9 ;
    %pop/vec4 1;
T_3.1 ;
    %jmp T_3;
    .thread T_3;
    .scope S_000001f40aa213e0;
T_4 ;
    %wait E_000001f40aa6d780;
    %load/vec4 v000001f40aacb0d0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_4.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacc3c0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacc460_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aacb7b0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aacd5e0_0, 0;
    %pushi/vec4 0, 0, 2;
    %assign/vec4 v000001f40aaca770_0, 0;
    %jmp T_4.1;
T_4.0 ;
    %load/vec4 v000001f40aaca770_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_4.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_4.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_4.4, 6;
    %jmp T_4.5;
T_4.2 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aacb7b0_0, 0;
    %load/vec4 v000001f40aacb2b0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_4.6, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aacd5e0_0, 0;
    %pushi/vec4 1, 0, 2;
    %assign/vec4 v000001f40aaca770_0, 0;
T_4.6 ;
    %jmp T_4.5;
T_4.3 ;
    %pushi/vec4 4294901760, 0, 32;
    %assign/vec4 v000001f40aacc3c0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacc460_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aacb7b0_0, 0;
    %pushi/vec4 2, 0, 2;
    %assign/vec4 v000001f40aaca770_0, 0;
    %jmp T_4.5;
T_4.4 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aacd5e0_0, 0;
    %pushi/vec4 0, 0, 2;
    %assign/vec4 v000001f40aaca770_0, 0;
    %jmp T_4.5;
T_4.5 ;
    %pop/vec4 1;
T_4.1 ;
    %jmp T_4;
    .thread T_4;
    .scope S_000001f40aa213e0;
T_5 ;
    %wait E_000001f40aa6d780;
    %load/vec4 v000001f40aacb0d0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_5.0, 8;
    %pushi/vec4 0, 0, 4;
    %assign/vec4 v000001f40aacae50_0, 0;
    %jmp T_5.1;
T_5.0 ;
    %load/vec4 v000001f40aaca590_0;
    %assign/vec4 v000001f40aacae50_0, 0;
T_5.1 ;
    %jmp T_5;
    .thread T_5;
    .scope S_000001f40aa213e0;
T_6 ;
    %wait E_000001f40aa6d080;
    %load/vec4 v000001f40aacae50_0;
    %store/vec4 v000001f40aaca590_0, 0, 4;
    %load/vec4 v000001f40aacae50_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 4;
    %cmp/u;
    %jmp/1 T_6.0, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 4;
    %cmp/u;
    %jmp/1 T_6.1, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 4;
    %cmp/u;
    %jmp/1 T_6.2, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 4;
    %cmp/u;
    %jmp/1 T_6.3, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 4;
    %cmp/u;
    %jmp/1 T_6.4, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 4;
    %cmp/u;
    %jmp/1 T_6.5, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 4;
    %cmp/u;
    %jmp/1 T_6.6, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 4;
    %cmp/u;
    %jmp/1 T_6.7, 6;
    %pushi/vec4 0, 0, 4;
    %store/vec4 v000001f40aaca590_0, 0, 4;
    %jmp T_6.9;
T_6.0 ;
    %load/vec4 v000001f40aaccc80_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_6.10, 8;
    %pushi/vec4 1, 0, 4;
    %store/vec4 v000001f40aaca590_0, 0, 4;
T_6.10 ;
    %jmp T_6.9;
T_6.1 ;
    %pushi/vec4 2, 0, 4;
    %store/vec4 v000001f40aaca590_0, 0, 4;
    %jmp T_6.9;
T_6.2 ;
    %load/vec4 v000001f40aacc640_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_6.12, 8;
    %pushi/vec4 3, 0, 4;
    %store/vec4 v000001f40aaca590_0, 0, 4;
T_6.12 ;
    %jmp T_6.9;
T_6.3 ;
    %pushi/vec4 4, 0, 4;
    %store/vec4 v000001f40aaca590_0, 0, 4;
    %jmp T_6.9;
T_6.4 ;
    %load/vec4 v000001f40aaca3b0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_6.14, 8;
    %pushi/vec4 5, 0, 4;
    %store/vec4 v000001f40aaca590_0, 0, 4;
T_6.14 ;
    %jmp T_6.9;
T_6.5 ;
    %pushi/vec4 6, 0, 4;
    %store/vec4 v000001f40aaca590_0, 0, 4;
    %jmp T_6.9;
T_6.6 ;
    %pushi/vec4 7, 0, 4;
    %store/vec4 v000001f40aaca590_0, 0, 4;
    %jmp T_6.9;
T_6.7 ;
    %pushi/vec4 0, 0, 4;
    %store/vec4 v000001f40aaca590_0, 0, 4;
    %jmp T_6.9;
T_6.9 ;
    %pop/vec4 1;
    %jmp T_6;
    .thread T_6, $push;
    .scope S_000001f40aa213e0;
T_7 ;
    %wait E_000001f40aa6d780;
    %load/vec4 v000001f40aacb0d0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.0, 8;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aaca950_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aaca310_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacd040_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacb490_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacb530_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aaca9f0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacaef0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacaf90_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aacac70_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aacb8f0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aaccb40_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aacb2b0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacd680_0, 0;
    %pushi/vec4 0, 0, 64;
    %assign/vec4 v000001f40aaca450_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000001f40aacba30_0, 0;
    %jmp T_7.1;
T_7.0 ;
    %load/vec4 v000001f40aacae50_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 4;
    %cmp/u;
    %jmp/1 T_7.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 4;
    %cmp/u;
    %jmp/1 T_7.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 4;
    %cmp/u;
    %jmp/1 T_7.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 4;
    %cmp/u;
    %jmp/1 T_7.5, 6;
    %dup/vec4;
    %pushi/vec4 4, 0, 4;
    %cmp/u;
    %jmp/1 T_7.6, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 4;
    %cmp/u;
    %jmp/1 T_7.7, 6;
    %dup/vec4;
    %pushi/vec4 6, 0, 4;
    %cmp/u;
    %jmp/1 T_7.8, 6;
    %dup/vec4;
    %pushi/vec4 7, 0, 4;
    %cmp/u;
    %jmp/1 T_7.9, 6;
    %jmp T_7.10;
T_7.2 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aacb8f0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aacac70_0, 0;
    %load/vec4 v000001f40aaccc80_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.11, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aacb8f0_0, 0;
    %load/vec4 v000001f40aacb990_0;
    %assign/vec4 v000001f40aaca950_0, 0;
T_7.11 ;
    %jmp T_7.10;
T_7.3 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aaccb40_0, 0;
    %jmp T_7.10;
T_7.4 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aaccb40_0, 0;
    %load/vec4 v000001f40aacc640_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.13, 8;
    %load/vec4 v000001f40aacd7c0_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %subi 65536, 0, 32;
    %assign/vec4 v000001f40aaca310_0, 0;
T_7.13 ;
    %jmp T_7.10;
T_7.5 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aacb2b0_0, 0;
    %jmp T_7.10;
T_7.6 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000001f40aacb2b0_0, 0;
    %load/vec4 v000001f40aaca3b0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.15, 8;
    %load/vec4 v000001f40aaca270_0;
    %assign/vec4 v000001f40aacb490_0, 0;
    %load/vec4 v000001f40aacaa90_0;
    %assign/vec4 v000001f40aacb530_0, 0;
T_7.15 ;
    %jmp T_7.10;
T_7.7 ;
    %load/vec4 v000001f40aaca310_0;
    %parti/s 1, 31, 6;
    %flag_set/vec4 8;
    %jmp/0xz  T_7.17, 8;
    %pushi/vec4 65536, 0, 32;
    %load/vec4 v000001f40aaca310_0;
    %add;
    %assign/vec4 v000001f40aacd040_0, 0;
    %jmp T_7.18;
T_7.17 ;
    %pushi/vec4 65536, 0, 32;
    %load/vec4 v000001f40aaca310_0;
    %sub;
    %assign/vec4 v000001f40aacd040_0, 0;
T_7.18 ;
    %jmp T_7.10;
T_7.8 ;
    %load/vec4 v000001f40aacd040_0;
    %load/vec4 v000001f40aacb490_0;
    %mul;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001f40aaca9f0_0, 0;
    %load/vec4 v000001f40aacd040_0;
    %load/vec4 v000001f40aacb530_0;
    %mul;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %assign/vec4 v000001f40aacaef0_0, 0;
    %load/vec4 v000001f40aaca310_0;
    %assign/vec4 v000001f40aacaf90_0, 0;
    %jmp T_7.10;
T_7.9 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000001f40aacac70_0, 0;
    %jmp T_7.10;
T_7.10 ;
    %pop/vec4 1;
T_7.1 ;
    %jmp T_7;
    .thread T_7;
    .scope S_000001f40a66be10;
T_8 ;
    %delay 5000, 0;
    %load/vec4 v000001f40aaccd20_0;
    %inv;
    %store/vec4 v000001f40aaccd20_0, 0, 1;
    %jmp T_8;
    .thread T_8;
    .scope S_000001f40a66be10;
T_9 ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000001f40aaccd20_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000001f40aaccbe0_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000001f40aaccfa0_0, 0, 1;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001f40aacd900_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001f40aacc780_0, 0, 2;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001f40aacd0e0_0, 0, 2;
    %delay 20000, 0;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000001f40aaccbe0_0, 0, 1;
    %delay 20000, 0;
    %vpi_call 2 92 "$display", "Testing Sphere implementation (final)" {0 0 0};
    %vpi_call 2 93 "$display", "=====================================" {0 0 0};
    %vpi_call 2 99 "$display", "\012Testing base combination [2,3]:" {0 0 0};
    %pushi/vec4 1, 0, 32;
    %store/vec4 v000001f40aacd2c0_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001f40aacc960_0, 0, 2;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001f40aacd720_0, 0, 2;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001f40aacc500_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001f40aacd860_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001f40aacd220_0, 0, 32;
    %pushi/vec4 16384, 0, 32;
    %store/vec4 v000001f40aacca00_0, 0, 32;
    %fork TD_sphere_final_test.run_test, S_000001f40aaadbe0;
    %join;
    %pushi/vec4 2, 0, 32;
    %store/vec4 v000001f40aacd2c0_0, 0, 32;
    %pushi/vec4 0, 0, 2;
    %store/vec4 v000001f40aacc960_0, 0, 2;
    %pushi/vec4 1, 0, 2;
    %store/vec4 v000001f40aacd720_0, 0, 2;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001f40aacc500_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000001f40aacd860_0, 0, 32;
    %pushi/vec4 4294934528, 0, 32;
    %store/vec4 v000001f40aacd220_0, 0, 32;
    %pushi/vec4 16384, 0, 32;
    %store/vec4 v000001f40aacca00_0, 0, 32;
    %fork TD_sphere_final_test.run_test, S_000001f40aaadbe0;
    %join;
    %vpi_call 2 106 "$display", "\012All tests completed" {0 0 0};
    %vpi_call 2 107 "$finish" {0 0 0};
    %end;
    .thread T_9;
# The file index is used to find the file name in the following table.
:file_names 7;
    "N/A";
    "<interactive>";
    "sphere_final_test.v";
    "sphere_fsm_32bit_simple_minimal.v";
    "vdcorput_fsm_32bit_simple.v";
    "div_mod_3.v";
    "div_mod_7.v";
