The development and improvement of physical design tools for Field-coupled Nanocomputing (FCN) are crucial for the success of this emerging technology. To compare the results of new physical design algorithms, this benchmark suite offers common benchmark functions in the domain combined with the state-of-the-art layouts. On top of layouts using different gate sets, such as the gate library QCAOne for Quantum-dot Cellular Automata (QCA) or Bestagon for Silicon Dangling Bonds (SiDBS), the following benchmark library also differentiates between different underlying clocking schemes like 2DDWave, USE, RES, ESR or ROW.
All layouts can be downloaded as fiction gate -level layouts files (.fgl), which can be read and written with fiction.
In order to create a benchmark set according to your needs, simply fill out the form below.
In case you have any problems or questions feel free to contact us via nanotech.cda@xcit.tum.de. More on our work on nanotechnologies is summarized on this page.