          Port       Port                  Ingress    Ingress
          VLAN ID    VLAN ID  Acceptable   Filtering  Filtering         Default
Interface Configured Current  Frame Types  Configured Current   GVRP    Priority
--------- ---------- -------- ------------ ---------- --------- ------- --------
1/0/1     1          1        Admit All    Disable    Disable   Disable 0
1/0/2     1          1        Admit All    Disable    Disable   Disable 0
1/0/3     1          1        Admit All    Disable    Disable   Disable 0
1/0/4     1          1        Admit All    Disable    Disable   Disable 0
1/0/5     1          1        Admit All    Disable    Disable   Disable 0
1/0/6     1          1        Admit All    Disable    Disable   Disable 0
1/0/7     1          1        Admit All    Disable    Disable   Disable 0
1/0/8     1          1        Admit All    Disable    Disable   Disable 0
1/0/9     1          1        Admit All    Enable     Enable    Disable 0
1/0/10    1          1        Admit All    Enable     Enable    Disable 0
1/0/11    4          4        Admit All    Enable     Enable    Disable 0
1/0/12    5          5        Admit All    Enable     Enable    Disable 0
1/0/13    1          1        Admit All    Enable     Enable    Disable 0
1/0/14    1          1        Admit All    Enable     Enable    Disable 0
1/0/15    1          1        Admit All    Enable     Enable    Disable 0
1/0/16    1          1        Admit All    Enable     Enable    Disable 0
lag 1     1          1        Admit All    Disable    Disable   Disable 0
lag 2     1          1        Admit All    Disable    Disable   Disable 0
lag 3     1          1        Admit All    Disable    Disable   Disable 0
lag 4     1          1        Admit All    Disable    Disable   Disable 0
lag 5     1          1        Admit All    Disable    Disable   Disable 0
lag 6     1          1        Admit All    Disable    Disable   Disable 0
lag 7     1          1        Admit All    Disable    Disable   Disable 0
lag 8     1          1        Admit All    Disable    Disable   Disable 0
lag 9     1          1        Admit All    Disable    Disable   Disable 0
lag 10    1          1        Admit All    Disable    Disable   Disable 0
lag 11    1          1        Admit All    Disable    Disable   Disable 0
lag 12    1          1        Admit All    Disable    Disable   Disable 0
lag 13    1          1        Admit All    Disable    Disable   Disable 0
lag 14    1          1        Admit All    Disable    Disable   Disable 0
lag 15    1          1        Admit All    Disable    Disable   Disable 0
lag 16    1          1        Admit All    Disable    Disable   Disable 0
lag 17    1          1        Admit All    Disable    Disable   Disable 0
lag 18    1          1        Admit All    Disable    Disable   Disable 0
lag 19    1          1        Admit All    Disable    Disable   Disable 0
lag 20    1          1        Admit All    Disable    Disable   Disable 0
lag 21    1          1        Admit All    Disable    Disable   Disable 0
lag 22    1          1        Admit All    Disable    Disable   Disable 0
lag 23    1          1        Admit All    Disable    Disable   Disable 0
lag 24    1          1        Admit All    Disable    Disable   Disable 0
lag 25    1          1        Admit All    Disable    Disable   Disable 0
lag 26    1          1        Admit All    Disable    Disable   Disable 0
lag 27    1          1        Admit All    Disable    Disable   Disable 0
lag 28    1          1        Admit All    Disable    Disable   Disable 0
lag 29    1          1        Admit All    Disable    Disable   Disable 0
lag 30    1          1        Admit All    Disable    Disable   Disable 0
lag 31    1          1        Admit All    Disable    Disable   Disable 0
lag 32    1          1        Admit All    Disable    Disable   Disable 0
lag 33    1          1        Admit All    Disable    Disable   Disable 0
lag 34    1          1        Admit All    Disable    Disable   Disable 0
lag 35    1          1        Admit All    Disable    Disable   Disable 0
lag 36    1          1        Admit All    Disable    Disable   Disable 0
lag 37    1          1        Admit All    Disable    Disable   Disable 0
lag 38    1          1        Admit All    Disable    Disable   Disable 0
lag 39    1          1        Admit All    Disable    Disable   Disable 0
lag 40    1          1        Admit All    Disable    Disable   Disable 0
lag 41    1          1        Admit All    Disable    Disable   Disable 0
lag 42    1          1        Admit All    Disable    Disable   Disable 0
lag 43    1          1        Admit All    Disable    Disable   Disable 0
lag 44    1          1        Admit All    Disable    Disable   Disable 0
lag 45    1          1        Admit All    Disable    Disable   Disable 0
lag 46    1          1        Admit All    Disable    Disable   Disable 0
lag 47    1          1        Admit All    Disable    Disable   Disable 0
lag 48    1          1        Admit All    Disable    Disable   Disable 0
lag 49    1          1        Admit All    Disable    Disable   Disable 0
lag 50    1          1        Admit All    Disable    Disable   Disable 0
lag 51    1          1        Admit All    Disable    Disable   Disable 0
lag 52    1          1        Admit All    Disable    Disable   Disable 0
lag 53    1          1        Admit All    Disable    Disable   Disable 0
lag 54    1          1        Admit All    Disable    Disable   Disable 0
lag 55    1          1        Admit All    Disable    Disable   Disable 0
lag 56    1          1        Admit All    Disable    Disable   Disable 0
lag 57    1          1        Admit All    Disable    Disable   Disable 0
lag 58    1          1        Admit All    Disable    Disable   Disable 0
lag 59    1          1        Admit All    Disable    Disable   Disable 0
lag 60    1          1        Admit All    Disable    Disable   Disable 0
lag 61    1          1        Admit All    Disable    Disable   Disable 0
lag 62    1          1        Admit All    Disable    Disable   Disable 0
lag 63    1          1        Admit All    Disable    Disable   Disable 0
lag 64    1          1        Admit All    Disable    Disable   Disable 0
lag 65    1          1        Admit All    Disable    Disable   Disable 0
lag 66    1          1        Admit All    Disable    Disable   Disable 0
lag 67    1          1        Admit All    Disable    Disable   Disable 0
lag 68    1          1        Admit All    Disable    Disable   Disable 0
lag 69    1          1        Admit All    Disable    Disable   Disable 0
lag 70    1          1        Admit All    Disable    Disable   Disable 0
lag 71    1          1        Admit All    Disable    Disable   Disable 0
lag 72    1          1        Admit All    Disable    Disable   Disable 0
lag 73    1          1        Admit All    Disable    Disable   Disable 0
lag 74    1          1        Admit All    Disable    Disable   Disable 0
lag 75    1          1        Admit All    Disable    Disable   Disable 0
lag 76    1          1        Admit All    Disable    Disable   Disable 0
lag 77    1          1        Admit All    Disable    Disable   Disable 0
lag 78    1          1        Admit All    Disable    Disable   Disable 0
lag 79    1          1        Admit All    Disable    Disable   Disable 0
lag 80    1          1        Admit All    Disable    Disable   Disable 0
lag 81    1          1        Admit All    Disable    Disable   Disable 0
lag 82    1          1        Admit All    Disable    Disable   Disable 0
lag 83    1          1        Admit All    Disable    Disable   Disable 0
lag 84    1          1        Admit All    Disable    Disable   Disable 0
lag 85    1          1        Admit All    Disable    Disable   Disable 0
lag 86    1          1        Admit All    Disable    Disable   Disable 0
lag 87    1          1        Admit All    Disable    Disable   Disable 0
lag 88    1          1        Admit All    Disable    Disable   Disable 0
lag 89    1          1        Admit All    Disable    Disable   Disable 0
lag 90    1          1        Admit All    Disable    Disable   Disable 0
lag 91    1          1        Admit All    Disable    Disable   Disable 0
lag 92    1          1        Admit All    Disable    Disable   Disable 0
lag 93    1          1        Admit All    Disable    Disable   Disable 0
lag 94    1          1        Admit All    Disable    Disable   Disable 0
lag 95    1          1        Admit All    Disable    Disable   Disable 0
lag 96    1          1        Admit All    Disable    Disable   Disable 0
lag 97    1          1        Admit All    Disable    Disable   Disable 0
lag 98    1          1        Admit All    Disable    Disable   Disable 0
lag 99    1          1        Admit All    Disable    Disable   Disable 0
lag 100   1          1        Admit All    Disable    Disable   Disable 0
lag 101   1          1        Admit All    Disable    Disable   Disable 0
lag 102   1          1        Admit All    Disable    Disable   Disable 0
lag 103   1          1        Admit All    Disable    Disable   Disable 0
lag 104   1          1        Admit All    Disable    Disable   Disable 0
lag 105   1          1        Admit All    Disable    Disable   Disable 0
lag 106   1          1        Admit All    Disable    Disable   Disable 0
lag 107   1          1        Admit All    Disable    Disable   Disable 0
lag 108   1          1        Admit All    Disable    Disable   Disable 0
lag 109   1          1        Admit All    Disable    Disable   Disable 0
lag 110   1          1        Admit All    Disable    Disable   Disable 0
lag 111   1          1        Admit All    Disable    Disable   Disable 0
lag 112   1          1        Admit All    Disable    Disable   Disable 0
lag 113   1          1        Admit All    Disable    Disable   Disable 0
lag 114   1          1        Admit All    Disable    Disable   Disable 0
lag 115   1          1        Admit All    Disable    Disable   Disable 0
lag 116   1          1        Admit All    Disable    Disable   Disable 0
lag 117   1          1        Admit All    Disable    Disable   Disable 0
lag 118   1          1        Admit All    Disable    Disable   Disable 0
lag 119   1          1        Admit All    Disable    Disable   Disable 0
lag 120   1          1        Admit All    Disable    Disable   Disable 0
lag 121   1          1        Admit All    Disable    Disable   Disable 0
lag 122   1          1        Admit All    Disable    Disable   Disable 0
lag 123   1          1        Admit All    Disable    Disable   Disable 0
lag 124   1          1        Admit All    Disable    Disable   Disable 0
lag 125   1          1        Admit All    Disable    Disable   Disable 0
lag 126   1          1        Admit All    Disable    Disable   Disable 0
lag 127   1          1        Admit All    Disable    Disable   Disable 0
lag 128   1          1        Admit All    Disable    Disable   Disable 0
