VERSION 7 ;
BUSBITCHARS "01" ;
DIVIDERCHAR "/" ;
PROPERTYDEFINITIONS
  MACRO NAME1 NAME2 ;
  MACRO NAME3 NAME4 ;
END PROPERTYDEFINITIONS



MACRO CMC_NMOS_n12_X1_Y1
  UNITS 
    DATABASE MICRONS UNITS 10 ;
  END UNITS
  PROPERTY SOMELITPROPERTY "SOMELIT" ;
  PROPERTY SOMENUMPROPERTY 7 ;
  ORIGIN 0 0 ;
  FOREIGN CMC_NMOS_n12_X1_Y1 0 0 ;
  SIZE 1.2800 BY 0.8400 ;
  PIN SA
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.2040 0.0680 0.4360 0.1000 ;
    END
  END SA
  PIN DA
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.3640 0.1520 0.5960 0.1840 ;
    END
  END DA
  PIN SB
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.6840 0.2360 0.9160 0.2680 ;
    END
  END SB
  PIN DB
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.8440 0.3200 1.0760 0.3520 ;
    END
  END DB
  PIN G
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.2840 0.4040 0.9960 0.4360 ;
    END
  END G
  OBS
    LAYER M1 ;
      RECT 0.3040 0.0480 0.3360 0.7080 ;
    LAYER M1 ;
      RECT 0.2240 0.0480 0.2560 0.7080 ;
    LAYER M1 ;
      RECT 0.3840 0.0480 0.4160 0.7080 ;
    LAYER M1 ;
      RECT 0.9440 0.0480 0.9760 0.7080 ;
    LAYER M1 ;
      RECT 0.8640 0.0480 0.8960 0.7080 ;
    LAYER M1 ;
      RECT 1.0240 0.0480 1.0560 0.7080 ;
    LAYER pc ;
      RECT 0.2710 0.0680 0.3690 0.1000 ;
    LAYER pc ;
      RECT 0.9110 0.0680 1.0090 0.1000 ;
  END
END CMC_NMOS_n12_X1_Y1
MACRO CMC_PMOS_S_n12_X1_Y1
  ORIGIN 0 0 ;
  FOREIGN CMC_PMOS_S_n12_X1_Y1 0 0 ;
  SIZE 1.2800 BY 0.8400 ;
  PIN S
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.3800 0.0480 0.4200 0.4560 ;
      LAYER M3 ;
        RECT 0.7000 0.0480 0.7400 0.4560 ;
    END
  END S
  PIN DA
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.4600 0.1320 0.5000 0.5400 ;
      LAYER M3 ;
        RECT 0.7800 0.1320 0.8200 0.5400 ;
    END
  END DA
  PIN DB
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.5400 0.2160 0.5800 0.6240 ;
      LAYER M3 ;
        RECT 0.8600 0.2160 0.9000 0.6240 ;
    END
  END DB
  PIN G
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.6200 0.3000 0.6600 0.7080 ;
      LAYER M3 ;
        RECT 0.9400 0.3000 0.9800 0.7080 ;
    END
  END G
  OBS
    LAYER M1 ;
      RECT 0.3040 0.0480 0.3360 0.7080 ;
    LAYER M1 ;
      RECT 0.2240 0.0480 0.2560 0.7080 ;
    LAYER M1 ;
      RECT 0.3840 0.0480 0.4160 0.7080 ;
    LAYER M1 ;
      RECT 0.9440 0.0480 0.9760 0.7080 ;
    LAYER M1 ;
      RECT 0.8640 0.0480 0.8960 0.7080 ;
    LAYER M1 ;
      RECT 1.0240 0.0480 1.0560 0.7080 ;
    LAYER M2 ;
      RECT 0.2040 0.0680 0.9160 0.1000 ;
    LAYER M2 ;
      RECT 0.2040 0.4040 0.9160 0.4360 ;
    LAYER M2 ;
      RECT 0.3640 0.1520 0.8360 0.1840 ;
    LAYER M2 ;
      RECT 0.3640 0.4880 0.8360 0.5200 ;
    LAYER M2 ;
      RECT 0.5240 0.2360 1.0760 0.2680 ;
    LAYER M2 ;
      RECT 0.5240 0.5720 1.0760 0.6040 ;
    LAYER M2 ;
      RECT 0.2840 0.3200 0.9960 0.3520 ;
    LAYER M2 ;
      RECT 0.2840 0.6560 0.9960 0.6880 ;
    LAYER pc ;
      RECT 0.2710 0.0680 0.3690 0.1000 ;
    LAYER pc ;
      RECT 0.9110 0.0680 1.0090 0.1000 ;
  END
END CMC_PMOS_S_n12_X1_Y1
MACRO CMC_PMOS_n12_X1_Y1
  ORIGIN 0 0 ;
  FOREIGN CMC_PMOS_n12_X1_Y1 0 0 ;
  SIZE 1.2800 BY 0.8400 ;
  PIN SA
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.2040 0.0680 0.4360 0.1000 ;
    END
  END SA
  PIN DA
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.3640 0.1520 0.5960 0.1840 ;
    END
  END DA
  PIN SB
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.6840 0.2360 0.9160 0.2680 ;
    END
  END SB
  PIN DB
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.8440 0.3200 1.0760 0.3520 ;
    END
  END DB
  PIN G
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.2840 0.4040 0.9960 0.4360 ;
    END
  END G
  OBS
    LAYER M1 ;
      RECT 0.3040 0.0480 0.3360 0.7080 ;
    LAYER M1 ;
      RECT 0.2240 0.0480 0.2560 0.7080 ;
    LAYER M1 ;
      RECT 0.3840 0.0480 0.4160 0.7080 ;
    LAYER M1 ;
      RECT 0.9440 0.0480 0.9760 0.7080 ;
    LAYER M1 ;
      RECT 0.8640 0.0480 0.8960 0.7080 ;
    LAYER M1 ;
      RECT 1.0240 0.0480 1.0560 0.7080 ;
    LAYER pc ;
      RECT 0.2710 0.0680 0.3690 0.1000 ;
    LAYER pc ;
      RECT 0.9110 0.0680 1.0090 0.1000 ;
  END
END CMC_PMOS_n12_X1_Y1
MACRO DCL_NMOS_n12_X1_Y1
  ORIGIN 0 0 ;
  FOREIGN DCL_NMOS_n12_X1_Y1 0 0 ;
  SIZE 0.6400 BY 0.8400 ;
  PIN S
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.2200 0.0480 0.2600 0.2880 ;
      LAYER M3 ;
        RECT 0.3800 0.0480 0.4200 0.2880 ;
    END
  END S
  PIN D
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.3000 0.1320 0.3400 0.3720 ;
      LAYER M3 ;
        RECT 0.4600 0.1320 0.5000 0.3720 ;
    END
  END D
  OBS
    LAYER M1 ;
      RECT 0.3040 0.0480 0.3360 0.7080 ;
    LAYER M1 ;
      RECT 0.2240 0.0480 0.2560 0.7080 ;
    LAYER M1 ;
      RECT 0.3840 0.0480 0.4160 0.7080 ;
    LAYER M2 ;
      RECT 0.2040 0.0680 0.4360 0.1000 ;
    LAYER M2 ;
      RECT 0.2040 0.2360 0.4360 0.2680 ;
    LAYER M2 ;
      RECT 0.2040 0.1520 0.5160 0.1840 ;
    LAYER M2 ;
      RECT 0.2040 0.3200 0.5160 0.3520 ;
    LAYER pc ;
      RECT 0.2710 0.0680 0.3690 0.1000 ;
  END
END DCL_NMOS_n12_X1_Y1
MACRO DCL_PMOS_n12_X1_Y1
  ORIGIN 0 0 ;
  FOREIGN DCL_PMOS_n12_X1_Y1 0 0 ;
  SIZE 0.6400 BY 0.8400 ;
  PIN S
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.2200 0.0480 0.2600 0.2880 ;
      LAYER M3 ;
        RECT 0.3800 0.0480 0.4200 0.2880 ;
    END
  END S
  PIN D
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.3000 0.1320 0.3400 0.3720 ;
      LAYER M3 ;
        RECT 0.4600 0.1320 0.5000 0.3720 ;
    END
  END D
  OBS
    LAYER M1 ;
      RECT 0.3040 0.0480 0.3360 0.7080 ;
    LAYER M1 ;
      RECT 0.2240 0.0480 0.2560 0.7080 ;
    LAYER M1 ;
      RECT 0.3840 0.0480 0.4160 0.7080 ;
    LAYER M2 ;
      RECT 0.2040 0.0680 0.4360 0.1000 ;
    LAYER M2 ;
      RECT 0.2040 0.2360 0.4360 0.2680 ;
    LAYER M2 ;
      RECT 0.2040 0.1520 0.5160 0.1840 ;
    LAYER M2 ;
      RECT 0.2040 0.3200 0.5160 0.3520 ;
    LAYER pc ;
      RECT 0.2710 0.0680 0.3690 0.1000 ;
  END
END DCL_PMOS_n12_X1_Y1
MACRO DP_NMOS_n12_X1_Y1
  ORIGIN 0 0 ;
  FOREIGN DP_NMOS_n12_X1_Y1 0 0 ;
  SIZE 1.2800 BY 0.8400 ;
  PIN S
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.2040 0.0680 0.9160 0.1000 ;
    END
  END S
  PIN DA
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.3640 0.1520 0.5960 0.1840 ;
    END
  END DA
  PIN DB
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.8440 0.2360 1.0760 0.2680 ;
    END
  END DB
  PIN GA
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.2840 0.3200 0.5160 0.3520 ;
    END
  END GA
  PIN GB
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 0.7640 0.4040 0.9960 0.4360 ;
    END
  END GB
  OBS
    LAYER M1 ;
      RECT 0.3040 0.0480 0.3360 0.7080 ;
    LAYER M1 ;
      RECT 0.2240 0.0480 0.2560 0.7080 ;
    LAYER M1 ;
      RECT 0.3840 0.0480 0.4160 0.7080 ;
    LAYER M1 ;
      RECT 0.9440 0.0480 0.9760 0.7080 ;
    LAYER M1 ;
      RECT 0.8640 0.0480 0.8960 0.7080 ;
    LAYER M1 ;
      RECT 1.0240 0.0480 1.0560 0.7080 ;
    LAYER pc ;
      RECT 0.2710 0.0680 0.3690 0.1000 ;
    LAYER pc ;
      RECT 0.9110 0.0680 1.0090 0.1000 ;
  END
END DP_NMOS_n12_X1_Y1
MACRO Res_4200
  ORIGIN 0 0 ;
  FOREIGN Res_4200 0 0 ;
  SIZE 2.3680 BY 1.8480 ;
  PIN PLUS
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT -0.0360 -0.0160 0.0360 0.0160 ;
    END
  END PLUS
  PIN MINUS
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 2.2680 1.7480 2.3400 1.7800 ;
    END
  END MINUS
  OBS
    LAYER M1 ;
      RECT -0.0160 -0.0360 0.0160 1.8000 ;
    LAYER M1 ;
      RECT -0.0160 1.7480 0.0800 1.7800 ;
    LAYER M1 ;
      RECT 0.0480 -0.0360 0.0800 1.8000 ;
    LAYER M1 ;
      RECT 0.0480 -0.0160 0.1440 0.0160 ;
    LAYER M1 ;
      RECT 0.1120 -0.0360 0.1440 1.8000 ;
    LAYER M1 ;
      RECT 0.1120 1.7480 0.2080 1.7800 ;
    LAYER M1 ;
      RECT 0.1760 -0.0360 0.2080 1.8000 ;
    LAYER M1 ;
      RECT 0.1760 -0.0160 0.2720 0.0160 ;
    LAYER M1 ;
      RECT 0.2400 -0.0360 0.2720 1.8000 ;
    LAYER M1 ;
      RECT 0.2400 1.7480 0.3360 1.7800 ;
    LAYER M1 ;
      RECT 0.3040 -0.0360 0.3360 1.8000 ;
    LAYER M1 ;
      RECT 0.3040 -0.0160 0.4000 0.0160 ;
    LAYER M1 ;
      RECT 0.3680 -0.0360 0.4000 1.8000 ;
    LAYER M1 ;
      RECT 0.3680 1.7480 0.4640 1.7800 ;
    LAYER M1 ;
      RECT 0.4320 -0.0360 0.4640 1.8000 ;
    LAYER M1 ;
      RECT 0.4320 -0.0160 0.5280 0.0160 ;
    LAYER M1 ;
      RECT 0.4960 -0.0360 0.5280 1.8000 ;
    LAYER M1 ;
      RECT 0.4960 1.7480 0.5920 1.7800 ;
    LAYER M1 ;
      RECT 0.5600 -0.0360 0.5920 1.8000 ;
    LAYER M1 ;
      RECT 0.5600 -0.0160 0.6560 0.0160 ;
    LAYER M1 ;
      RECT 0.6240 -0.0360 0.6560 1.8000 ;
    LAYER M1 ;
      RECT 0.6240 1.7480 0.7200 1.7800 ;
    LAYER M1 ;
      RECT 0.6880 -0.0360 0.7200 1.8000 ;
    LAYER M1 ;
      RECT 0.6880 -0.0160 0.7840 0.0160 ;
    LAYER M1 ;
      RECT 0.7520 -0.0360 0.7840 1.8000 ;
    LAYER M1 ;
      RECT 0.7520 1.7480 0.8480 1.7800 ;
    LAYER M1 ;
      RECT 0.8160 -0.0360 0.8480 1.8000 ;
    LAYER M1 ;
      RECT 0.8160 -0.0160 0.9120 0.0160 ;
    LAYER M1 ;
      RECT 0.8800 -0.0360 0.9120 1.8000 ;
    LAYER M1 ;
      RECT 0.8800 1.7480 0.9760 1.7800 ;
    LAYER M1 ;
      RECT 0.9440 -0.0360 0.9760 1.8000 ;
    LAYER M1 ;
      RECT 0.9440 -0.0160 1.0400 0.0160 ;
    LAYER M1 ;
      RECT 1.0080 -0.0360 1.0400 1.8000 ;
    LAYER M1 ;
      RECT 1.0080 1.7480 1.1040 1.7800 ;
    LAYER M1 ;
      RECT 1.0720 -0.0360 1.1040 1.8000 ;
    LAYER M1 ;
      RECT 1.0720 -0.0160 1.1680 0.0160 ;
    LAYER M1 ;
      RECT 1.1360 -0.0360 1.1680 1.8000 ;
    LAYER M1 ;
      RECT 1.1360 1.7480 1.2320 1.7800 ;
    LAYER M1 ;
      RECT 1.2000 -0.0360 1.2320 1.8000 ;
    LAYER M1 ;
      RECT 1.2000 -0.0160 1.2960 0.0160 ;
    LAYER M1 ;
      RECT 1.2640 -0.0360 1.2960 1.8000 ;
    LAYER M1 ;
      RECT 1.2640 1.7480 1.3600 1.7800 ;
    LAYER M1 ;
      RECT 1.3280 -0.0360 1.3600 1.8000 ;
    LAYER M1 ;
      RECT 1.3280 -0.0160 1.4240 0.0160 ;
    LAYER M1 ;
      RECT 1.3920 -0.0360 1.4240 1.8000 ;
    LAYER M1 ;
      RECT 1.3920 1.7480 1.4880 1.7800 ;
    LAYER M1 ;
      RECT 1.4560 -0.0360 1.4880 1.8000 ;
    LAYER M1 ;
      RECT 1.4560 -0.0160 1.5520 0.0160 ;
    LAYER M1 ;
      RECT 1.5200 -0.0360 1.5520 1.8000 ;
    LAYER M1 ;
      RECT 1.5200 1.7480 1.6160 1.7800 ;
    LAYER M1 ;
      RECT 1.5840 -0.0360 1.6160 1.8000 ;
    LAYER M1 ;
      RECT 1.5840 -0.0160 1.6800 0.0160 ;
    LAYER M1 ;
      RECT 1.6480 -0.0360 1.6800 1.8000 ;
    LAYER M1 ;
      RECT 1.6480 1.7480 1.7440 1.7800 ;
    LAYER M1 ;
      RECT 1.7120 -0.0360 1.7440 1.8000 ;
    LAYER M1 ;
      RECT 1.7120 -0.0160 1.8080 0.0160 ;
    LAYER M1 ;
      RECT 1.7760 -0.0360 1.8080 1.8000 ;
    LAYER M1 ;
      RECT 1.7760 1.7480 1.8720 1.7800 ;
    LAYER M1 ;
      RECT 1.8400 -0.0360 1.8720 1.8000 ;
    LAYER M1 ;
      RECT 1.8400 -0.0160 1.9360 0.0160 ;
    LAYER M1 ;
      RECT 1.9040 -0.0360 1.9360 1.8000 ;
    LAYER M1 ;
      RECT 1.9040 1.7480 2.0000 1.7800 ;
    LAYER M1 ;
      RECT 1.9680 -0.0360 2.0000 1.8000 ;
    LAYER M1 ;
      RECT 1.9680 -0.0160 2.0640 0.0160 ;
    LAYER M1 ;
      RECT 2.0320 -0.0360 2.0640 1.8000 ;
    LAYER M1 ;
      RECT 2.0320 1.7480 2.1280 1.7800 ;
    LAYER M1 ;
      RECT 2.0960 -0.0360 2.1280 1.8000 ;
    LAYER M1 ;
      RECT 2.0960 -0.0160 2.1920 0.0160 ;
    LAYER M1 ;
      RECT 2.1600 -0.0360 2.1920 1.8000 ;
    LAYER M1 ;
      RECT 2.1600 1.7480 2.2560 1.7800 ;
    LAYER M1 ;
      RECT 2.2240 -0.0360 2.2560 1.8000 ;
    LAYER M1 ;
      RECT 2.2240 -0.0160 2.3200 0.0160 ;
    LAYER M1 ;
      RECT 2.2880 -0.0360 2.3200 1.8000 ;
    LAYER boundary ;
      RECT -0.0640 -0.0840 2.3680 1.8480 ;
  END
END Res_4200
MACRO Res_8000
  ORIGIN 0 0 ;
  FOREIGN Res_8000 0 0 ;
  SIZE 3.0080 BY 2.6880 ;
  PIN PLUS
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT -0.0360 -0.0160 0.0360 0.0160 ;
    END
  END PLUS
  PIN MINUS
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M2 ;
        RECT 2.9080 2.5880 2.9800 2.6200 ;
    END
  END MINUS
  OBS
    LAYER M1 ;
      RECT -0.0160 -0.0360 0.0160 2.6400 ;
    LAYER M1 ;
      RECT -0.0160 2.5880 0.0800 2.6200 ;
    LAYER M1 ;
      RECT 0.0480 -0.0360 0.0800 2.6400 ;
    LAYER M1 ;
      RECT 0.0480 -0.0160 0.1440 0.0160 ;
    LAYER M1 ;
      RECT 0.1120 -0.0360 0.1440 2.6400 ;
    LAYER M1 ;
      RECT 0.1120 2.5880 0.2080 2.6200 ;
    LAYER M1 ;
      RECT 0.1760 -0.0360 0.2080 2.6400 ;
    LAYER M1 ;
      RECT 0.1760 -0.0160 0.2720 0.0160 ;
    LAYER M1 ;
      RECT 0.2400 -0.0360 0.2720 2.6400 ;
    LAYER M1 ;
      RECT 0.2400 2.5880 0.3360 2.6200 ;
    LAYER M1 ;
      RECT 0.3040 -0.0360 0.3360 2.6400 ;
    LAYER M1 ;
      RECT 0.3040 -0.0160 0.4000 0.0160 ;
    LAYER M1 ;
      RECT 0.3680 -0.0360 0.4000 2.6400 ;
    LAYER M1 ;
      RECT 0.3680 2.5880 0.4640 2.6200 ;
    LAYER M1 ;
      RECT 0.4320 -0.0360 0.4640 2.6400 ;
    LAYER M1 ;
      RECT 0.4320 -0.0160 0.5280 0.0160 ;
    LAYER M1 ;
      RECT 0.4960 -0.0360 0.5280 2.6400 ;
    LAYER M1 ;
      RECT 0.4960 2.5880 0.5920 2.6200 ;
    LAYER M1 ;
      RECT 0.5600 -0.0360 0.5920 2.6400 ;
    LAYER M1 ;
      RECT 0.5600 -0.0160 0.6560 0.0160 ;
    LAYER M1 ;
      RECT 0.6240 -0.0360 0.6560 2.6400 ;
    LAYER M1 ;
      RECT 0.6240 2.5880 0.7200 2.6200 ;
    LAYER M1 ;
      RECT 0.6880 -0.0360 0.7200 2.6400 ;
    LAYER M1 ;
      RECT 0.6880 -0.0160 0.7840 0.0160 ;
    LAYER M1 ;
      RECT 0.7520 -0.0360 0.7840 2.6400 ;
    LAYER M1 ;
      RECT 0.7520 2.5880 0.8480 2.6200 ;
    LAYER M1 ;
      RECT 0.8160 -0.0360 0.8480 2.6400 ;
    LAYER M1 ;
      RECT 0.8160 -0.0160 0.9120 0.0160 ;
    LAYER M1 ;
      RECT 0.8800 -0.0360 0.9120 2.6400 ;
    LAYER M1 ;
      RECT 0.8800 2.5880 0.9760 2.6200 ;
    LAYER M1 ;
      RECT 0.9440 -0.0360 0.9760 2.6400 ;
    LAYER M1 ;
      RECT 0.9440 -0.0160 1.0400 0.0160 ;
    LAYER M1 ;
      RECT 1.0080 -0.0360 1.0400 2.6400 ;
    LAYER M1 ;
      RECT 1.0080 2.5880 1.1040 2.6200 ;
    LAYER M1 ;
      RECT 1.0720 -0.0360 1.1040 2.6400 ;
    LAYER M1 ;
      RECT 1.0720 -0.0160 1.1680 0.0160 ;
    LAYER M1 ;
      RECT 1.1360 -0.0360 1.1680 2.6400 ;
    LAYER M1 ;
      RECT 1.1360 2.5880 1.2320 2.6200 ;
    LAYER M1 ;
      RECT 1.2000 -0.0360 1.2320 2.6400 ;
    LAYER M1 ;
      RECT 1.2000 -0.0160 1.2960 0.0160 ;
    LAYER M1 ;
      RECT 1.2640 -0.0360 1.2960 2.6400 ;
    LAYER M1 ;
      RECT 1.2640 2.5880 1.3600 2.6200 ;
    LAYER M1 ;
      RECT 1.3280 -0.0360 1.3600 2.6400 ;
    LAYER M1 ;
      RECT 1.3280 -0.0160 1.4240 0.0160 ;
    LAYER M1 ;
      RECT 1.3920 -0.0360 1.4240 2.6400 ;
    LAYER M1 ;
      RECT 1.3920 2.5880 1.4880 2.6200 ;
    LAYER M1 ;
      RECT 1.4560 -0.0360 1.4880 2.6400 ;
    LAYER M1 ;
      RECT 1.4560 -0.0160 1.5520 0.0160 ;
    LAYER M1 ;
      RECT 1.5200 -0.0360 1.5520 2.6400 ;
    LAYER M1 ;
      RECT 1.5200 2.5880 1.6160 2.6200 ;
    LAYER M1 ;
      RECT 1.5840 -0.0360 1.6160 2.6400 ;
    LAYER M1 ;
      RECT 1.5840 -0.0160 1.6800 0.0160 ;
    LAYER M1 ;
      RECT 1.6480 -0.0360 1.6800 2.6400 ;
    LAYER M1 ;
      RECT 1.6480 2.5880 1.7440 2.6200 ;
    LAYER M1 ;
      RECT 1.7120 -0.0360 1.7440 2.6400 ;
    LAYER M1 ;
      RECT 1.7120 -0.0160 1.8080 0.0160 ;
    LAYER M1 ;
      RECT 1.7760 -0.0360 1.8080 2.6400 ;
    LAYER M1 ;
      RECT 1.7760 2.5880 1.8720 2.6200 ;
    LAYER M1 ;
      RECT 1.8400 -0.0360 1.8720 2.6400 ;
    LAYER M1 ;
      RECT 1.8400 -0.0160 1.9360 0.0160 ;
    LAYER M1 ;
      RECT 1.9040 -0.0360 1.9360 2.6400 ;
    LAYER M1 ;
      RECT 1.9040 2.5880 2.0000 2.6200 ;
    LAYER M1 ;
      RECT 1.9680 -0.0360 2.0000 2.6400 ;
    LAYER M1 ;
      RECT 1.9680 -0.0160 2.0640 0.0160 ;
    LAYER M1 ;
      RECT 2.0320 -0.0360 2.0640 2.6400 ;
    LAYER M1 ;
      RECT 2.0320 2.5880 2.1280 2.6200 ;
    LAYER M1 ;
      RECT 2.0960 -0.0360 2.1280 2.6400 ;
    LAYER M1 ;
      RECT 2.0960 -0.0160 2.1920 0.0160 ;
    LAYER M1 ;
      RECT 2.1600 -0.0360 2.1920 2.6400 ;
    LAYER M1 ;
      RECT 2.1600 2.5880 2.2560 2.6200 ;
    LAYER M1 ;
      RECT 2.2240 -0.0360 2.2560 2.6400 ;
    LAYER M1 ;
      RECT 2.2240 -0.0160 2.3200 0.0160 ;
    LAYER M1 ;
      RECT 2.2880 -0.0360 2.3200 2.6400 ;
    LAYER M1 ;
      RECT 2.2880 2.5880 2.3840 2.6200 ;
    LAYER M1 ;
      RECT 2.3520 -0.0360 2.3840 2.6400 ;
    LAYER M1 ;
      RECT 2.3520 -0.0160 2.4480 0.0160 ;
    LAYER M1 ;
      RECT 2.4160 -0.0360 2.4480 2.6400 ;
    LAYER M1 ;
      RECT 2.4160 2.5880 2.5120 2.6200 ;
    LAYER M1 ;
      RECT 2.4800 -0.0360 2.5120 2.6400 ;
    LAYER M1 ;
      RECT 2.4800 -0.0160 2.5760 0.0160 ;
    LAYER M1 ;
      RECT 2.5440 -0.0360 2.5760 2.6400 ;
    LAYER M1 ;
      RECT 2.5440 2.5880 2.6400 2.6200 ;
    LAYER M1 ;
      RECT 2.6080 -0.0360 2.6400 2.6400 ;
    LAYER M1 ;
      RECT 2.6080 -0.0160 2.7040 0.0160 ;
    LAYER M1 ;
      RECT 2.6720 -0.0360 2.7040 2.6400 ;
    LAYER M1 ;
      RECT 2.6720 2.5880 2.7680 2.6200 ;
    LAYER M1 ;
      RECT 2.7360 -0.0360 2.7680 2.6400 ;
    LAYER M1 ;
      RECT 2.7360 -0.0160 2.8320 0.0160 ;
    LAYER M1 ;
      RECT 2.8000 -0.0360 2.8320 2.6400 ;
    LAYER M1 ;
      RECT 2.8000 2.5880 2.8960 2.6200 ;
    LAYER M1 ;
      RECT 2.8640 -0.0360 2.8960 2.6400 ;
    LAYER M1 ;
      RECT 2.8640 -0.0160 2.9600 0.0160 ;
    LAYER M1 ;
      RECT 2.9280 -0.0360 2.9600 2.6400 ;
    LAYER boundary ;
      RECT -0.0640 -0.0840 3.0080 2.6880 ;
  END
END Res_8000
MACRO SCM_NMOS_n12_X2_Y1
  ORIGIN 0 0 ;
  FOREIGN SCM_NMOS_n12_X2_Y1 0 0 ;
  SIZE 2.5600 BY 0.8400 ;
  PIN S
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 1.1000 0.0480 1.1400 0.3720 ;
      LAYER M3 ;
        RECT 1.3400 0.0480 1.3800 0.3720 ;
    END
  END S
  PIN DA
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 1.1800 0.1320 1.2200 0.4560 ;
      LAYER M3 ;
        RECT 1.4200 0.1320 1.4600 0.4560 ;
    END
  END DA
  PIN DB
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 1.2600 0.2160 1.3000 0.5400 ;
      LAYER M3 ;
        RECT 1.5000 0.2160 1.5400 0.5400 ;
    END
  END DB
  OBS
    LAYER M1 ;
      RECT 0.3040 0.0480 0.3360 0.7080 ;
    LAYER M1 ;
      RECT 0.2240 0.0480 0.2560 0.7080 ;
    LAYER M1 ;
      RECT 0.3840 0.0480 0.4160 0.7080 ;
    LAYER M1 ;
      RECT 0.9440 0.0480 0.9760 0.7080 ;
    LAYER M1 ;
      RECT 0.8640 0.0480 0.8960 0.7080 ;
    LAYER M1 ;
      RECT 1.0240 0.0480 1.0560 0.7080 ;
    LAYER M1 ;
      RECT 1.5840 0.0480 1.6160 0.7080 ;
    LAYER M1 ;
      RECT 1.6640 0.0480 1.6960 0.7080 ;
    LAYER M1 ;
      RECT 1.5040 0.0480 1.5360 0.7080 ;
    LAYER M1 ;
      RECT 2.2240 0.0480 2.2560 0.7080 ;
    LAYER M1 ;
      RECT 2.3040 0.0480 2.3360 0.7080 ;
    LAYER M1 ;
      RECT 2.1440 0.0480 2.1760 0.7080 ;
    LAYER M2 ;
      RECT 0.2040 0.0680 2.3560 0.1000 ;
    LAYER M2 ;
      RECT 0.2040 0.3200 2.3560 0.3520 ;
    LAYER M2 ;
      RECT 0.2840 0.1520 2.2760 0.1840 ;
    LAYER M2 ;
      RECT 0.2840 0.4040 2.2760 0.4360 ;
    LAYER M2 ;
      RECT 1.0040 0.2360 1.5560 0.2680 ;
    LAYER M2 ;
      RECT 1.0040 0.4880 1.5560 0.5200 ;
    LAYER pc ;
      RECT 0.2710 0.0680 0.3690 0.1000 ;
    LAYER pc ;
      RECT 0.9110 0.0680 1.0090 0.1000 ;
    LAYER pc ;
      RECT 1.5510 0.0680 1.6490 0.1000 ;
    LAYER pc ;
      RECT 2.1910 0.0680 2.2890 0.1000 ;
  END
END SCM_NMOS_n12_X2_Y1
MACRO Switch_NMOS_n12_X1_Y1
  ORIGIN 0 0 ;
  FOREIGN Switch_NMOS_n12_X1_Y1 0 0 ;
  SIZE 0.6400 BY 0.8400 ;
  PIN S
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.1400 0.0480 0.1800 0.3720 ;
      LAYER M3 ;
        RECT 0.3800 0.0480 0.4200 0.3720 ;
    END
  END S
  PIN D
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.2200 0.1320 0.2600 0.4560 ;
      LAYER M3 ;
        RECT 0.4600 0.1320 0.5000 0.4560 ;
    END
  END D
  PIN G
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.3000 0.2160 0.3400 0.5400 ;
      LAYER M3 ;
        RECT 0.5400 0.2160 0.5800 0.5400 ;
    END
  END G
  OBS
    LAYER M1 ;
      RECT 0.3040 0.0480 0.3360 0.7080 ;
    LAYER M1 ;
      RECT 0.2240 0.0480 0.2560 0.7080 ;
    LAYER M1 ;
      RECT 0.3840 0.0480 0.4160 0.7080 ;
    LAYER M2 ;
      RECT 0.1240 0.0680 0.4360 0.1000 ;
    LAYER M2 ;
      RECT 0.1240 0.3200 0.4360 0.3520 ;
    LAYER M2 ;
      RECT 0.2040 0.1520 0.5160 0.1840 ;
    LAYER M2 ;
      RECT 0.2040 0.4040 0.5160 0.4360 ;
    LAYER M2 ;
      RECT 0.2040 0.2360 0.5960 0.2680 ;
    LAYER M2 ;
      RECT 0.2040 0.4880 0.5960 0.5200 ;
    LAYER pc ;
      RECT 0.2710 0.0680 0.3690 0.1000 ;
  END
END Switch_NMOS_n12_X1_Y1
MACRO Switch_NMOS_n12_X2_Y1
  ORIGIN 0 0 ;
  FOREIGN Switch_NMOS_n12_X2_Y1 0 0 ;
  SIZE 1.2800 BY 0.8400 ;
  PIN S
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.4600 0.0480 0.5000 0.3720 ;
      LAYER M3 ;
        RECT 0.7000 0.0480 0.7400 0.3720 ;
    END
  END S
  PIN D
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.5400 0.1320 0.5800 0.4560 ;
      LAYER M3 ;
        RECT 0.7800 0.1320 0.8200 0.4560 ;
    END
  END D
  PIN G
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.6200 0.2160 0.6600 0.5400 ;
      LAYER M3 ;
        RECT 0.8600 0.2160 0.9000 0.5400 ;
    END
  END G
  OBS
    LAYER M1 ;
      RECT 0.3040 0.0480 0.3360 0.7080 ;
    LAYER M1 ;
      RECT 0.2240 0.0480 0.2560 0.7080 ;
    LAYER M1 ;
      RECT 0.3840 0.0480 0.4160 0.7080 ;
    LAYER M1 ;
      RECT 0.9440 0.0480 0.9760 0.7080 ;
    LAYER M1 ;
      RECT 0.8640 0.0480 0.8960 0.7080 ;
    LAYER M1 ;
      RECT 1.0240 0.0480 1.0560 0.7080 ;
    LAYER M2 ;
      RECT 0.2040 0.0680 0.9160 0.1000 ;
    LAYER M2 ;
      RECT 0.2040 0.3200 0.9160 0.3520 ;
    LAYER M2 ;
      RECT 0.3640 0.1520 1.0760 0.1840 ;
    LAYER M2 ;
      RECT 0.3640 0.4040 1.0760 0.4360 ;
    LAYER M2 ;
      RECT 0.2840 0.2360 0.9960 0.2680 ;
    LAYER M2 ;
      RECT 0.2840 0.4880 0.9960 0.5200 ;
    LAYER pc ;
      RECT 0.2710 0.0680 0.3690 0.1000 ;
    LAYER pc ;
      RECT 0.9110 0.0680 1.0090 0.1000 ;
  END
END Switch_NMOS_n12_X2_Y1
MACRO Switch_PMOS_n12_X1_Y1
  ORIGIN 0 0 ;
  FOREIGN Switch_PMOS_n12_X1_Y1 0 0 ;
  SIZE 0.6400 BY 0.8400 ;
  PIN S
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.1400 0.0480 0.1800 0.3720 ;
      LAYER M3 ;
        RECT 0.3800 0.0480 0.4200 0.3720 ;
    END
  END S
  PIN D
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.2200 0.1320 0.2600 0.4560 ;
      LAYER M3 ;
        RECT 0.4600 0.1320 0.5000 0.4560 ;
    END
  END D
  PIN G
    DIRECTION INOUT ;
    USE SIGNAL ;
    PORT
      LAYER M3 ;
        RECT 0.3000 0.2160 0.3400 0.5400 ;
      LAYER M3 ;
        RECT 0.5400 0.2160 0.5800 0.5400 ;
    END
  END G
  OBS
    LAYER M1 ;
      RECT 0.3040 0.0480 0.3360 0.7080 ;
    LAYER M1 ;
      RECT 0.2240 0.0480 0.2560 0.7080 ;
    LAYER M1 ;
      RECT 0.3840 0.0480 0.4160 0.7080 ;
    LAYER M2 ;
      RECT 0.1240 0.0680 0.4360 0.1000 ;
    LAYER M2 ;
      RECT 0.1240 0.3200 0.4360 0.3520 ;
    LAYER M2 ;
      RECT 0.2040 0.1520 0.5160 0.1840 ;
    LAYER M2 ;
      RECT 0.2040 0.4040 0.5160 0.4360 ;
    LAYER M2 ;
      RECT 0.2040 0.2360 0.5960 0.2680 ;
    LAYER M2 ;
      RECT 0.2040 0.4880 0.5960 0.5200 ;
    LAYER pc ;
      RECT 0.2710 0.0680 0.3690 0.1000 ;
  END
END Switch_PMOS_n12_X1_Y1
