Yosys Synthesis Report for op
Top module: op
PDK: sky130
Clock constraint: 10.0 ns
============================================================


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 |  yosys -- Yosys Open SYnthesis Suite                                       |
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 |  Copyright (C) 2012 - 2020  Claire Xenia Wolf <claire@yosyshq.com>         |
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 Yosys 0.37+90 (git sha1 16ff3e0a3, clang 14.0.0-1ubuntu1.1 -fPIC -Os)


-- Executing script file `./synth_out/synth_op/scripts/op_synth.ys' --

1. Executing Verilog-2005 frontend: designs/tiny_alu/src/tiny_alu.v

STDERR:
designs/tiny_alu/src/tiny_alu.v:4: ERROR: syntax error, unexpected TOK_ID, expecting ',' or '=' or ')'

